Abstract
In order to meet the fast performance and high bandwidth of today’s system designs, FPGA devices are providing a large number of pins with increasingly faster switching speeds. These higher package pin counts, together with the fact that the devices support many different I/O standards and support different package types, creates a challenge in successfully creating the FPGA pin-out efficiently and correctly. The cost of a board re-spin, due to a problem with the pin-out, is expensive in terms of both the cost of the board re-spin and the impact on the project schedule.
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© 2010 Springer Science+Business Media, LLC
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Simpson, P. (2010). Board Design. In: FPGA Design. Springer, New York, NY. https://doi.org/10.1007/978-1-4419-6339-0_6
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DOI: https://doi.org/10.1007/978-1-4419-6339-0_6
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Publisher Name: Springer, New York, NY
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Online ISBN: 978-1-4419-6339-0
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