Abstract
Once all the circuits have been designed, the next step is board layout. This is a very critical step in the development process because the effectiveness of the filtering circuits depends on where the components are placed relative to the DSP pins. Also, the board layout has a big effect on noise, crosstalk and transmission line effects so optimizing the layout can minimize these effects. This chapter covers the printed circuit board stackup and layout techniques for low noise and EMI.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Montrose Mark (2000) Printed Circuit Board Design Techniques for EMC Compliance. The Institute of Electrical and Electronics Engineers, New York.
Texas Instruments Inc (2000) Design Guidelines: Integrated Circuit Design For Reduced EMI. Application Note.
Montrose Mark (1996) Analysis on the Effectiveness of Image Planes within a Printed Circuit Board. The Institute of Electrical and Electronics Engineers.
Author information
Authors and Affiliations
Rights and permissions
Copyright information
© 2010 Springer US
About this chapter
Cite this chapter
Tran, T.T. (2010). Printed Circuit Board (PCB) Layout. In: High-Speed DSP and Analog System Design. Springer, Boston, MA. https://doi.org/10.1007/978-1-4419-6309-3_10
Download citation
DOI: https://doi.org/10.1007/978-1-4419-6309-3_10
Published:
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4419-6308-6
Online ISBN: 978-1-4419-6309-3
eBook Packages: EngineeringEngineering (R0)