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Challenges of DSP Systems Design

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High-Speed DSP and Analog System Design
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Abstract

As DSP performance levels and clock frequencies continue to rise at a rapid rate, managing noise, radiation and power consumption becomes an increasingly important issue. At high frequencies, the traces on a PCB carrying signals act as transmission lines and antennas that can generate signal reflections and radiations that cause distortion and create challenges in achieving electromagnetic compatibility (EMC) compliance. These can often make it difficult to meet Federal Communication Commission (FCC) Class A and Class B [1] requirements. Heat sinks and venting that may be required to address the thermal challenges of high performance designs can further exacerbate EMC problems. Many systems today have embedded wireless local area network (WLAN) and Bluetooth which will create further difficulties as intentional radiators are designed into the system.

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References

  1. Federal Communication Commission (2005) Unintentional Radiators Title 47 (47CFR), Part 15 B. http://www.fcc.gov/oet/info/rules/part15/part15-91905.pdf

  2. Hiers T and Ma R (1999) TMS320C6000 McBSP: I2S Interface. Texas Instruments Inc’s Application Report, SPRA595.

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  3. Franco S (2002) Design with Operational Amplifiers and Analog Integrated Circuits. McGraw-Hill, New York.

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  4. Nassar M, Gulati K, DeYoung M, Evans B, and Tinsley K (2008) Mitigating Near-field Interference in Laptop Embedded Wireless Transceivers. IEEE Journal of Signal Processing Systems.

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Tran, T.T. (2010). Challenges of DSP Systems Design. In: High-Speed DSP and Analog System Design. Springer, Boston, MA. https://doi.org/10.1007/978-1-4419-6309-3_1

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  • DOI: https://doi.org/10.1007/978-1-4419-6309-3_1

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  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4419-6308-6

  • Online ISBN: 978-1-4419-6309-3

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