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Virtual Prototype Design

  • Katalin Popovici
  • Frédéric Rousseau
  • Ahmed A. Jerraya
  • Marilyn Wolf
Chapter
Part of the Embedded Systems book series (EMSY)

Abstract

This chapter details the virtual prototype design. The virtual prototype design consists of integrating the HAL implementation into the software stack and establishing the final memory mapping. The verification of the software is performed by using classical co-simulation with instruction set simulators (ISS). The key contribution in this chapter represents the virtual prototype definition, organization, and design using SystemC for the token ring application running on the 1AX architecture, Motion JPEG running on the Diopsis RDT architecture, and H.264 encoder running on the Diopsis R2DT architecture. The Motion JPEG application is executed using ISS on different types of single processor (ARM7, ARM9, and DSP) and the H.264 encoder is simulated using ISS running on both multi-processor architecture with three ARM7 processors and single processor (ARM7 and ARM9). The simulation of the virtual prototype model allows to verify the software binary and the memory mapping.

Keywords

Field Programmable Gate Array Processor Core Virtual Prototype Design Space Exploration Register Transfer Level 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Copyright information

© Springer Science+Business Media, LLC 2010

Authors and Affiliations

  • Katalin Popovici
    • 1
  • Frédéric Rousseau
    • 2
  • Ahmed A. Jerraya
    • 2
  • Marilyn Wolf
    • 3
  1. 1.MathWorks, Inc.NatickUSA
  2. 2.Laboratorie TIMAGrenobleFrance
  3. 3.Electrical & Computer Engineering Dept.Georgia Institute of TechnologyAtlantaUSA

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