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TSV-Based 3D Integration

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Three Dimensional System Integration

Abstract

Theoretical studies in the 1980s [1, 2] suggested that significant reductions in signal delay and power consumption could be achieved with 3D integrated circuits (3D ICs). A 3D IC is a chip that consists of multiple tiers of thinned-active 2D integrated circuits (2D ICs) that are stacked, bonded, and electrically connected with vertical vias formed through silicon or oxide layers and whose placement within the tiers is discretionary. The term “tier” is used to distinguish the transferred layers of a 3D IC from design and physical layers and is the functional section of a chip or wafer that consists of the active silicon, the interconnect, and, for a silicon-on-oxide (SOI) wafer, the buried oxide (BOX). The basic features of a 3D IC are illustrated in Fig. 2.1 in a symbolic drawing along with a cross-section of an actual 3D IC. The TSV (through silicon via) is an essential feature of the 3D IC technology and is the vertical-electrical connection formed between tiers and through silicon or oxide. A TSV is formed by aligning, defining, and etching a cavity between two tiers to expose an electrode in the lower tier; lining the sidewalls of the cavity with an insulator; and filling the cavity with metal or doped polysilicon to complete the connection. A TSV drawing and a cross-section of a TSV are shown in Fig. 2.2.

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Acknowledgments

The work was sponsored by the Defense Advanced Research Projects Agency under Air Force contract #FA8721-05-C-0002. Opinions, interpretations, conclusions, and recommendations are those of the authors and are not necessarily endorsed by the United States Government.

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Authors and Affiliations

  1. Lincoln Laboratory, Massachusetts Institute of Technology, Lexington, MA, USA

    James Burns

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  1. James Burns
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Correspondence to James Burns .

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Editors and Affiliations

  1. , Dept. of Electrical and Computer Enginee, National Technical University of Athens, Heroon Polytechneiou 9, Athens, 157 80, Greece

    Antonis Papanikolaou

  2. Dept. Electrical & Computer Engineering, National Technical University of Athens, Heroon Polytechneiou 9, Athens, 157 80, Greece

    Dimitrios Soudris

  3. San Diego, California, USA

    Riko Radojcic

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Burns, J. (2011). TSV-Based 3D Integration. In: Papanikolaou, A., Soudris, D., Radojcic, R. (eds) Three Dimensional System Integration. Springer, Boston, MA. https://doi.org/10.1007/978-1-4419-0962-6_2

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  • DOI: https://doi.org/10.1007/978-1-4419-0962-6_2

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