Conclusions and Future Directions
This chapter summarizes the work presented in this monograph. It provide a brief summary of all the analysis and design approaches presented to facilitate the implementation of radiation and process variation tolerant VLSI circuits. This chapter also presents some future directions for research, and a summary of the broader impact of this work.
KeywordsCombinational Circuit VLSI Circuit SRAM Cell Dynamic Voltage Scaling VLSI System
Unable to display preview. Download preview PDF.
- 1.K. Mohanram, “Closed-form simulation and robustness models for SEU-tolerant design,” in Proc. of the VLSI Test Symposium, 2005, pp. 327–333.Google Scholar
- 2.P. Dahlgren and P. Liden, “A switch-level algorithm for simulation of transients in combinational logic,” in Proc. of the Intl. Symposium on Fault-Tolerant Computing, June 1995, pp. 207–216.Google Scholar
- 3.B. Zhang, A. Arapostathis, S. Nassif, and M. Orshansky, “Analytical modeling of SRAM dynamic stability,” in Proc. of the Intl. Conf. on Computer-Aided Design, Nov. 2006, pp. 315–322.Google Scholar
- 4.Synopsys Inc., Mountain View, CA, Sentaurus user’s manuals, 2007.12 edition.Google Scholar
- 5.Q. A. Khan, S. K. Wadhwa, and K. Misri, “A single supply level shifter for multi voltage systems,” in Proc. of the Intl. Conf. on VLSI Design, Jan. 2006, pp. 1–4.Google Scholar