A Paradigm for Processing Network Protocols in Parallel

Abstract

Network packet processing applications increasingly execute at speeds of 1–40 gigabits per second, often running on multi-core chips that contain multithreaded network processing units (NPUs) and a general-purpose processor core. Such applications are typically programmed in a language that exposes NPU specifics needed to optimize lowlevel thread control and resources. This facilitates optimization at the cost of increased software complexity and reduced portability. In contrast, our approach provides portability by combining coarse-grained parallelism with programming in the packetC® (CloudShield Technologies) language’s high-level constructs. This paper focuses on searching packet contents for packet protocol headers. We require the host system to locate headers for layers 2, 3 and 4, and to encode their offsets in a packet information block (PIB). packetC provides descriptors, C-style structures superimposed on the packet array at runtime-calculable, user or PIB-supplied offsets. We deliver state-of-the-practice performance via an FPGA for locating layer offsets and via micro-coded interpretation that treats PIB layer offsets as a special addressing mode.