The previous chapters presented the complete theoretical study of the averaging technique, and the description of two ADCs using it. Although averaging may accomplish a significant offset reduction, there are a number of tradeoffs (see sections 3.5.4 to 3.5.10) and practical limitations (for example signal headroom at low supply voltages) that restrict its effectiveness. Moreover, this technique is not applicable to latched comparators.1 To ensure that their offset voltages have a negligible impact on the linearity of the ADC, the stages preceding them must have a reasonably high gain.
Averaging has been commonly used in flash and in folding and interpolation converters, but not in two-step ADCs. This happens because the offset reduction is achieved by averaging the random deviations of many components. Therefore, it is only effective when the stages being averaged have a significant number of differential pairs, as in flash and folding ADCs. The fine flash sub-converters existing in two-step subranging ADCs usually have a small resolution — therefore, only a few pre-amplifiers — but must exhibit very low offset voltages. Averaging is not advantageous in this situation.
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© 2009 Springer-Verlag Berlin Heidelberg
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(2009). Offset Cancellation Methods. In: Offset Reduction Techniques in Highspeed Analog-To-Digital Converters. Analog Circuits and Signal Processing Series. Springer, Dordrecht. https://doi.org/10.1007/978-1-4020-9716-4_5
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DOI: https://doi.org/10.1007/978-1-4020-9716-4_5
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