Abstract
For an efficient design flow the substantiation of early design decisions is obligatory. This implies a simple and fast architecture evaluation using simulative approaches. This paper introduces an approach which enables a powerful hardware/software partitioning and the reuse of already existing functional code by applying minimal code modifications only. The primary objective is to provide a solution to enable an automated application. In this novel approach, code readability and transformation effort are improved significantly by using the powerful operator overloading mechanism of C++. The implementation can easily be customized and combined with other approaches concerning simulative design evaluations. For example, it is possible to realize implicit timing behavior, transparent communication over module boundaries, tracing of simulation data or collecting debugging information.
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Kerstan, C., Bannow, N., Rosenstiel, W. (2009). Efficient Architecture Evaluation Using Functional Mapping. In: Radetzki, M. (eds) Languages for Embedded Systems and their Applications. Lecture Notes in Electrical Engineering, vol 36. Springer, Dordrecht. https://doi.org/10.1007/978-1-4020-9714-0_11
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DOI: https://doi.org/10.1007/978-1-4020-9714-0_11
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