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Arithmetic Core Design and Design Reuse of Soft IP Cores

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Unleash the System On Chip using FPGAs and Handel C

As integrated circuit technologies fight to meet and overcome the Moore's law, the quest towards higher performance, greater densities, increasing system complexity and on the top of all, shrinking market window necessities innovation in design methodology. The literature survey reveals that the current, popular design approach, which generally consists of top-down synthesis, software simulation and limited design reuse, is not keeping pace with Moore's Law, which is equivalent to a 59% growth rate. Design productivity has been increasing by roughly 25% per year. This amounts to the growing gap between the designed and manufacturing [75].

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© 2009 Springer Science+Business Media B.V.

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Kamat, R.K., Shinde, S.A., Shelake, V.G. (2009). Arithmetic Core Design and Design Reuse of Soft IP Cores. In: Unleash the System On Chip using FPGAs and Handel C. Springer, Dordrecht. https://doi.org/10.1007/978-1-4020-9362-3_5

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  • DOI: https://doi.org/10.1007/978-1-4020-9362-3_5

  • Publisher Name: Springer, Dordrecht

  • Print ISBN: 978-1-4020-9361-6

  • Online ISBN: 978-1-4020-9362-3

  • eBook Packages: EngineeringEngineering (R0)

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