Advertisement

SC2 StateCharts to SystemC: Automatic Executable Models Generation

  • Marcello Mura
  • Marco Paolieri
Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 10)

Abstract

The recent development of embedded systems calls for the necessity of a complete framework for design and simulation of applications that span through all levels of system design. Desirable characteristics of such a framework are rapidity of use, simplicity and reusability. For this purpose we already introduced a generator that converts specifications written with a subset of StateCharts to behavioral SystemC [16, 17]. We present here the new version of our tool: most of the limitations of the previous versions have been overcome, the considered subset of the StateCharts formalism has been extended and the target has been changed from behavioral to Register Transfer Level (RTL) SystemC. A major enhancement of this new version is the possibility of obtaining various module instances starting from a single specification, which is vital in some contexts (e.g. Wireless Sensors Networks simulation). The semantics chosen for our StateCharts diagrams is clearly described. The generation of executable models, as well as the kernel template of the generated code, are discussed in detail.

Keywords

Class Diagram Register Transfer Level Executable Model Transaction Level Modeling Major Enhancement 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
  2. 2.
  3. 3.
    M. Von Der Beek. A comparison of StateChart variants. In Formal Techniques in Real-Time and Fault tolerant Systems, 1994.Google Scholar
  4. 4.
    F. Fummi, M. G. Sami, and F. Tartarini. Use of Statecharts-Related description to achieve testable design of control subsystems. In Proc. GLSVLSI, 1997.Google Scholar
  5. 5.
    S. Gnesi, D. Latella, and M. Massink. Modular semantics for a UML statechart diagrams kernel and its extension to multicharts and branching time model-checking. Journal of Formal Aspects of Computing, 51, 2002.Google Scholar
  6. 6.
    D. Harel and A. Naamad. The STATEMATE semantics of StateCharts. ACM Transactions on Software Engineering and Methodologies, 1995.Google Scholar
  7. 7.
    D. Harel. Statecharts: A visual formulation for complex systems. Science of Computer Programming, 1987.Google Scholar
  8. 8.
    M. Kay. XSLT 2.0 Programmer’s Reference (Programmer to Programmer). WROX, 3 edition, Aug. 2004.Google Scholar
  9. 9.
    D. Latella, I. Majzik, and M. Massink. Automatic verification of a behavioural subset of UML statechart diagrams using the spin model-checker. Journal of Logic and Algebraic Programming, 11, 1999.Google Scholar
  10. 10.
    J. Lilius and I. P. Paltor. vUML: A tool for verifying UML models. ase.Google Scholar
  11. 11.
    Grant Martin. SystemC and the future of design languages: Opportunities for users and research. In Proc. SBCCI, 2003.Google Scholar
  12. 12.
    G. De Micheli and R. K. Gupta. Hardware/Software co-design. In IEEE Proceedings, Mar. 1997.Google Scholar
  13. 13.
    E. Mikk, Y. Lakhnech, M. Siegel, and G. J. Holzmann. Implementing statecharts in promela/spin. In Proc. WIFT, 1998.Google Scholar
  14. 14.
    M. Mura. Ultra-low power optimizations for the ieee 802.15.4 networking protocol. In Proc. MASS, 2007.Google Scholar
  15. 15.
    M. Mura, M. Paolieri, F. Fabbri, L. Negri, and M. G. Sami. Power modeling and power analysis for IEEE 802.15.4: a concurrent state machine approach. In Proc. CCNC, 2007.Google Scholar
  16. 16.
    M. Mura, M. Paolieri, L. Negri, and M. G. Sami. Statecharts to SystemC: a high level hardware simulation approach. In Proc. GLVLSI, 2007.Google Scholar
  17. 17.
    L. Negri and A. Chiarini. StateC: a power modeling and simulation flow for communication protocols. In Proc. FDL, Sept. 2005.Google Scholar
  18. 18.
    K. D. Nguyen, Z. Sun, P. Thiagarajan, and W. Wong. Model-driven SoC design via executable UML to SystemC. In Proc. RTSS.Google Scholar
  19. 19.
    A. Pnueli and M. Shalev. What is in a step: on the semantics of StateCharts. In Proc. TACS, 1991.Google Scholar
  20. 20.
    Chen Xi, Lu JianHua, Zhou ZuCheng, and Shang YaoHui. Modeling SystemC design in UML and automatic code generation. In Proc. ASP-DAC, 2005.Google Scholar

Copyright information

© Springer Science + Business Media B.V 2008

Authors and Affiliations

  • Marcello Mura
    • 1
  • Marco Paolieri
    • 1
  1. 1.ALaRI, Faculty of InformaticsUniversity of LuganoSwitzerland

Personalised recommendations