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SC2 StateCharts to SystemC: Automatic Executable Models Generation

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Embedded Systems Specification and Design Languages

Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 10))

Abstract

The recent development of embedded systems calls for the necessity of a complete framework for design and simulation of applications that span through all levels of system design. Desirable characteristics of such a framework are rapidity of use, simplicity and reusability. For this purpose we already introduced a generator that converts specifications written with a subset of StateCharts to behavioral SystemC [16, 17]. We present here the new version of our tool: most of the limitations of the previous versions have been overcome, the considered subset of the StateCharts formalism has been extended and the target has been changed from behavioral to Register Transfer Level (RTL) SystemC. A major enhancement of this new version is the possibility of obtaining various module instances starting from a single specification, which is vital in some contexts (e.g. Wireless Sensors Networks simulation). The semantics chosen for our StateCharts diagrams is clearly described. The generation of executable models, as well as the kernel template of the generated code, are discussed in detail.

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Mura, M., Paolieri, M. (2008). SC2 StateCharts to SystemC: Automatic Executable Models Generation. In: Villar, E. (eds) Embedded Systems Specification and Design Languages. Lecture Notes in Electrical Engineering, vol 10. Springer, Dordrecht. https://doi.org/10.1007/978-1-4020-8297-9_16

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  • DOI: https://doi.org/10.1007/978-1-4020-8297-9_16

  • Publisher Name: Springer, Dordrecht

  • Print ISBN: 978-1-4020-8296-2

  • Online ISBN: 978-1-4020-8297-9

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