Abstract
In this paper, we compare the underlying models of computation of the system description languages SystemC and Esterel. Although these languages have a rather different origin, we show that the execution/simulation of programs written in these languages consists of many corresponding computation steps. As a consequence, we identify different classes of Esterel programs that can be easily translated to SystemC processes and vice versa. Moreover, we identify concepts like preemption in Esterel that are difficult to implement in a structured way in SystemC.
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Brandt, J., Schneider, K. (2008). How Different Are Esterel and SystemC. In: Villar, E. (eds) Embedded Systems Specification and Design Languages. Lecture Notes in Electrical Engineering, vol 10. Springer, Dordrecht. https://doi.org/10.1007/978-1-4020-8297-9_1
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DOI: https://doi.org/10.1007/978-1-4020-8297-9_1
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