The Test and Verification Influential Papers in the 10 Years of DATE

  • T. W. Williams
  • R. Kapur


The history of test is looked at for IC Test to put in context the papers that are being highlighted at DATE. This paper focuses on the path that led to the adoption of structural test. ATE related historical aspects are not mentioned.


Transition Fault Fault Coverage Soft Error Delay Defect Automatic Test Pattern Generation 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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  1. [1]
    M. J. Y. Williams and J. B. Angell. Enhancing Testability of Large Scale Integrated Circuits via Test Points and Additional Logic, IEEE Transaction on Computers, C-22, 46–60, 1973.CrossRefGoogle Scholar
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    S. Funatsu, N. Wakatsuki, and T. Arima, Test Generation System in Japan, Proc. 12th Ann. Design Automation Conference, pp. 23–25, 1975.Google Scholar
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    E. B. Eichelberger and T. W. Williams A Logic Design Structure for LSI Testability, Proc. 14th Design Automation Conference, New Orleans, LA, pp. 462–468, June 1977.Google Scholar
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    T. W. Williams and N. C. Brown, Defect Level as a Function of Fault Coverage, IEEE Transactions on Computers, Vol. C-30, No. 12, Dec. 1981, 987–988.CrossRefGoogle Scholar
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    T. W. Williams, R. H. Dennard, R. Kapur, M. R. Mercer, and W. Maley, Iddq Testing for High Performance CMOS - The Next Ten Years, Proc. 1996 European Design and Test Conference, Paris, France, pp. 578–583, March 1996.Google Scholar
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    T. W. Williams, R. H. Dennard, R. Kapur, M. R. Mercer, and W. Maley, Iddq Test: Sensitivity Analysis to Scaling, in Proc. 27th International Test Conference, Washington DC, 1996 pp. 786–792.Google Scholar
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    J. Rajski, J. Tyszer, M. Kassab, N. Mukherjee, R. Thompson, Kun-Han Tsai, A. Hertwig, N. Tamarapalli, G. Mrugalski, G. Eide, and Jun Qian, Embedded Deterministic Test for Low Cost Manufacturing test Test Conference, 2002. Proc. International 7–10 Oct. 2002 pp. (s):301–310.Google Scholar
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    S. Samaranayake, E. Gizdarski, N. Sitchinava, F. Neuveux, R. Kapur, and T. W. Williams, “A Reconfigurable Shared Scan-In Architecture”, Proc. 21st IEEE VLSI Test Symposium, 2003, pp. 9–14.Google Scholar
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    N. Sitchinava, S. Samaranayake, R. Kapur, E. Gizdarski, F. Neuveux, and T. W. Williams’ Changing the Scan Enable During Shift, Proc. 22ed IEEE VLSI Test Symposium, 2004, pp. 73–78.Google Scholar
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    E. S. Park, M. R. Mercer and T. W. Williams, Statistical Delay Fault Coverage and Defect Level for Delay Faults, (with E. S. Park and M. R. Mercer), Proc. 1988 International Test Conference, Washington, DC, pp. 492–499, September 1988.Google Scholar
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    T. W. Williams, Underwood, and M. R. Mercer, The Interdependence Between Delay-Optimization of Synthesized Networks and Testing, Proc. 28th ACM/IEEE Design Automation Conference, San Francisco, CA, pp. 87–92, June 1991.Google Scholar
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    [12] T. W. Williams, E. S. Park, B. Underwood, and M. R. Mercer “Delay Testing Quality in Timing-Optimized Designs”, Proc. 1991 IEEE International Test Conference, Nashville, TN, October 1991. pp. 897–905.Google Scholar
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    L. Anghel and M. Nicolaidis, Cost Reduction and Evaluation of a Temporary Faults Detecting Technique, DATE 2000.Google Scholar
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    E Larsson, Z Peng, An Integrated System-On-Chip Test Framework, DATE 2001.Google Scholar
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    A Giani, S Sheng and M S Hsiao, Efficient Spectral Techniques for Sequential ATPG, DATE 2001.Google Scholar
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    E. Goldberg and Y. Novikov, BerkMin: A Fast and Robust Sat-Solver, DATE 2002.Google Scholar
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    P. Gonciari, B. Al-Hashimi, and N. Nicolici, Improving Compression Ratio, Area Overhead, and Test Application Time for System-on-a-Chip Test Data Compression/Decompression, DATE 2002.Google Scholar
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    P. Bernardi, E. Sanchez, M. Schillaci, G. Squillero, and M. Sonza Reorda, An Effective Technique for Minimizing the Cost of Processor Software-Based Diagnosis in SoCs, DATE 2006.Google Scholar

Copyright information

© Springer 2008

Authors and Affiliations

  • T. W. Williams
    • 1
  • R. Kapur
    • 1
  1. 1.Synopsys Inc.USA

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