Realizing multistandard transceivers with maximum hardware reuse amongst the given standards is of great importance to minimize the manufacturing cost of emerging multiservice wireless terminals. A well-defined architecture in conjunction with a reconfigurable building-block synthesis is essential to formulate such kind of tunable transceiver under a wide range of specifications. In this chapter, we present both fundamental and state-of-theart techniques that help selecting transceiver architecture for single-/multistandard design. It starts off by reviewing the basic schemes and examining their suitability for use in modern wireless communication systems (GSM, WCDMA, IEEE 802.11, Bluetooth, ZigBee and Ultra Wideband).
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(2007). Transceiver Architecture Selection – Review, State-Of-The-Art Survey And Case Study. In: Analog-Baseband Architectures And Circuits For Multistandard And Lowvoltage Wireless Transceivers. Analog Circuits and Signal Processing. Springer, Dordrecht. https://doi.org/10.1007/978-1-4020-6433-3_2
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DOI: https://doi.org/10.1007/978-1-4020-6433-3_2
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