Status and trends in SOI nanodevices

A review of recently explored new materials and architectures for SOI nanodevices is given. Recent advances in the understanding of the sensitivity of electron and hole transport to the tensile or compressive uniaxial and biaxial strains in thin film SOI are presented. The electrical properties in multi-gate Si, SiGe, Ge and GaAs MOSFETs and Nanowires realized with various channel orientations are also addressed. The impact of gate misalignment or underlap, as well as the use of the back gate for charge storage in double-gate nanodevices and of capacitorless DRAM are also outlined.