High-Accuracy ADC Design and Measurements
The main bulk of this chapter is dedicated to the design for CMOS integration of the principal ADC circuit blocks. Firstly, a high-level system overview is given of both measurement type and signal-chain type ADCs. Next, a new flexible track-and-hold (T&H) is presented and discussed. The circuit implementation of the proposed cyclic ADC is then presented. A separate section is devoted to a proposed single-ended OTA with high CMRR, since it is a key circuit block needed for high quality operation of the T&H and ADC. Finally, measurement results are documented of the fabricated 12-bit cyclic ADC, as well as simulation results of two laid out pipelined ADCs for 10-bit and 14-bit applications. They serve to demonstrate the potential of the C +C concept to achieving uncalibrated high-accuracy or high-speed. The performances of these circuits in terms of their power and area figures-of-merit (FOM s) are compared to those of other published ADCs of the recent past.
KeywordsCurrent Mirror Common Mode Signal Input Dynamic Range Settling Speed Tail Current Source
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