Emerging technologies allow the implementation of advanced car features enhancing the safety and the comfort of the driver. These complex functions are distributed among several ECUs, implemented by multiple tasks executed on each processor, and are characterized by non-functional requirements, including timing constraints. The design of the physical architecture and the placement of tasks and messages must be performed in accordance with the constraints and optimizing the performance of the functions. We show how schedulability analysis can be used in the development of complex automotive systems to find the architectures that can best support the target application in a what-if iterative process, and we address the opportunities for the synthesis of architecture configurations. A case study of an experimental vehicle shows the applicability of the approach.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Sangiovanni Vincentelli A. Defining Platform-based Design. EEDesign of EETimes, February 2002.
Lee E.A., Overview of the Ptolemy Project, Technical Memorandum UCB/ERL M03/25, July 2, 2003, University of California, Berkeley, CA, 94720, USA.
Balarin F., Hsieh H., Lavagno L., Passerone C., Sangiovanni-Vincentelli A., and Watanabe Y., Metropolis: An Integrated Environment for Electronic System Design, IEEE Computer, April 2003.
Akos Ledeczi et al. The Generic Modeling Environment, Workshop on Intelligent Signal Processing, Budapest, Hungary, May 17, 2001.
G. Berry, M. Kishinevsky, S. Singh, System Level Design and Verification Using a Synchronous Language, Tutorial ICCAD’03, San Jose.
The OMG Systems Modeling Language web page, http://www.omgsysml.org/
A. Hamann, R. Henia, M. Jerzak, R. Racu, K. Richter, and R. Ernst, SymTA/S symbolic timing analysis for systems, available at http://www.symta.org, 2004.
The Mathworks Simulink and StateFlow. web page: http://www.mathworks.com.
ASCET-SD web page, available at http://en.etasgroup.com/products/ascet/
M. G. Harbour, M. Klein, and J. Lehoczky. Timing analysis for fixed-priority scheduling of hard real-time systems. IEEE Transactions on Software Engineering, 20(1), January 1994.
OSEK. Osek os version 2.2.3 specification. http://www.osek-vdx.org, 2006.
R. Bosch. Can specification, version 2.0. Stuttgart, 1991.
K. W. Tindell. Holistic schedulability analysis for distributed hard real-time systems. Tech. Report YCS197, Computer Science Dept., University of York, 1993.
J. Y. L. Boudec and P. Thiran, Network calculus - a theory of deterministic queuing systems for the internet, in LNCS 2050, Springer, 2001.
S. Chakraborty and L. Thiele, A new task model for streaming applications and its schedulabi-lity analysis, in IEEE DATE Conference, Munich, March 2005.
S. Tripakis, C. Sofronis, N. Scaife, and P. Caspi, Semantics-preserving and memory-efficient implementation of inter-task communication on static-priority or edf schedulers, 5th ACM EMSOFT Conference, 2005.
M. Baleani, A. Ferrari, L. Mangeruca, and A.S. Vincentelli, Efficient embedded software design with synchronous models, 5th ACM EMSOFT Conference, 2005.
R. Racu, M. Jersak, and R. Ernst. Applying sensitivity analysis in real-time distributed systems. In Proceedings of the 11th RTAS Conference, pages 160-169, San Francisco (CA), U.S.A., March 2005.
Wei Zheng, Marco Di Natale, Claudio Pinello, Paolo Giusto, Alberto L. Sangiovanni-Vincentelli: Synthesis of task and message activation models in real-time distributed automotive systems. DATE 2007, Paris, April 2007, pages 93-98.
K. Tindell, A. Burns, and A.J. Wellings. Calculating controller area network (can) message response times. Control Eng. Practice, 3(8):1163-1169, 1995.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2007 Springer
About this paper
Cite this paper
Natale, M.D., Zheng, W., Giusto, P. (2007). Using System-Level Timing Analysis for the Evaluation and Synthesis of Automotive Architectures. In: Ramesh, S., Sampath, P. (eds) Next Generation Design and Verification Methodologies for Distributed Embedded Control Systems. Springer, Dordrecht. https://doi.org/10.1007/978-1-4020-6254-4_8
Download citation
DOI: https://doi.org/10.1007/978-1-4020-6254-4_8
Publisher Name: Springer, Dordrecht
Print ISBN: 978-1-4020-6253-7
Online ISBN: 978-1-4020-6254-4
eBook Packages: EngineeringEngineering (R0)