In order to provide embedded systems with the required efficiency and flexibility, software is increasingly being used by designers to implement functionalities. Consequently, embedded systems software components are becoming more and more complex and the use of operating systems (OS) is mandatory to deal with concurrent and inter-task communication. This evolution makes the validation of hardware/software difficult and the use of classical techniques even more problematic.
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References
Carbonkernel, available at http://www.carbonkernel.org.
D. Desmet, D. Verkest, H. de Man, “Operating System Based Software Generation for Systems-on-Chip”, Proc. Design Automation Conf. (DAC), June 2000.
L. Gauthier, S. Yoo, A. A. Jerraya, “Automatic Generation and Targeting of Application Specific Operating Systems and Embedded Systems Software”, Proc. Design Automation and Test in Europe, 2001.
D. Jaggar, Advanced RISC Machines Architectural Reference Manual, Prentice-Hall, 1996.
K. Lahiri, A. Raghunantan, S. Dey, “Efficient Exploration of the SoC Communication Architecture Design Space”, Proc. International Conference on Computer Aided Design, pp. 424-430, Nov. 2000.
M. Lajolo, M. Lazarescu, A. Sangivanni-Vicentelli, “A Compilation-Based Software Estimation Scheme for Hardware/Software Co-Simulation”, International Workshop on Hardware Software Codesign, 1999.
J. Rowson, “Hardware/Software Cosimulation”, Proc. Design Automation Conference (DAC), 1994.
Computer Networks and ISDN Systems. CCITT SDL, 1987.
K. Suzuki, A. Sangivanni-Vicentelli, “Efficient Software Performance Estimation Methods for Hardware/Software Design”, Proc. Design Automation Conference, June 1996.
D. C. Black, J. Donovan, SystemC: From the Ground Up, Springer, 2004.
K. Ueda, K. Sakanushi, Y. Takeuchi, M. Imai, “Architecture-level performance estimation method based on system-level profiling”, Proc. Design Automation and Test in Europe 2004.
Wind River Systems Inc., “VxWorks 5.4”, available at http://www.wrs.com/products/html/vxwks5.4.html/.
J. Zhu, D. D. Gajski, “A Retargetable, Ultra-Fast Instruction Set Simulator”, DATE Conference 99, Munich, Germany.
V. Zivojnovic, H. Meyr, “Compiled Hw/Sw Cosimulation”, Proc. Design Automation Conference (DAC), 1996.
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Nicolescu, G., Jerraya, A.A. (2007). Anatomy of a Hardware/Software Execution Model in Heterogeneous Systems. In: Nicolescu, G., Jerraya, A.A. (eds) Global Specification and Validation of Embedded Systems. Springer, Dordrecht. https://doi.org/10.1007/978-1-4020-6153-0_5
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