Improved Performance Fractional-N Frequency Synthesizer

Part of the Analog Circuits and Signal Processing book series (ACSP)


In chapter 5, we detailed the design, implementation, and measurement of a multimode fractional-N frequency synthesizer for WLAN standards. The synthesizer offered the best performance to date. However, additional circuit could be designed to enhance the performance of the synthesizer at the cost of increased circuit complexity. Those additions include adaptive CP architecture to maintain loop gain and phase transfer functions while operating in fractional mode, i.e. instantaneous different integer divisions. Also included is an adaptive band switching control to maintain frequency agility while offering optimum phase noise performance in the band of interest. Along with other additional techniques that improve the synthesizer performance, those additions will be described in this chapter in detail.


Phase Noise Loop Gain Loop Filter Frequency Synthesizer Fractional Divider 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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