Abstract
Digital high-performance circuits grow in size and complexity following an exponential trend line. This trend was first recognized and announced by Gordon E. Moore in 1965 [1] (hence the name “Moore’s law”) and shows that the number of components in an integrated circuit doubles every 18 months. Technology scaling allows to implement more and more complex functions on a single chip, lowering at the same time the cost per function and increasing the operating frequency of digital cores. Digital cores used in microprocessors and digital signal processors (DSPs) profit from this evolution to handle an increasing quantity of data in shorter and shorter time slots.
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© 2007 Springer
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Muller, P., Leblebici, Y. (2007). Introduction. In: CMOS Multichannel Single-Chip Receivers for Multi-Gigabit Optical Data Communications. Analog Circuits and Signal Processing. Springer, Dordrecht. https://doi.org/10.1007/978-1-4020-5912-4_1
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DOI: https://doi.org/10.1007/978-1-4020-5912-4_1
Publisher Name: Springer, Dordrecht
Print ISBN: 978-1-4020-5911-7
Online ISBN: 978-1-4020-5912-4
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