Automatic Tools for Design Hardening

  • Celia López-Ongil
  • Luis Entrena
  • Mario García-Valderas
  • Marta Portela-García


Historically, there has been a lack of CAD tools for the design of online testable circuits. As a consequence, the design of on-line testable circuits is currently being made manually to a large extent. In this paper we detailed an academic tool for the automatic insertion of fault-tolerant structures in designs described at Register Transfer Level (RTL). With this tool, a fault-tolerant version of the design can be automatically produced according to the user specifications. The resulting fault-tolerant design is also described at RTL and can be simulated and synthesized with commercial tools. Examples are shown to demonstrate the capabilities of this approach.


Register Transfer Level Hardware Description Language Synthesis Tool Redundant Code Hardware Redundancy 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer 2007

Authors and Affiliations

  • Celia López-Ongil
    • 1
  • Luis Entrena
    • 1
  • Mario García-Valderas
    • 1
  • Marta Portela-García
    • 1
  1. 1.Electronic Technology DepartmentCarlos III University of MadridLeganésSpain

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