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Design Hardening Methodologies for ASICs

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Radiation Effects on Embedded Systems

Abstract

Application-Specific Integrated Circuits (ASICs) can be effectively hardened against radiation effects by design, an approach that is commonly known as “Hardening By Design” (HBD). This contribution describes several HBD methodologies that are commonly used in CMOS technologies to protect the circuit from both Total Ionizing Dose (TID) and Single Event Effects (SEE).

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Author information

Authors and Affiliations

  1. CERN, Route de Meyrin 385, Geneva 23, 1211, Switzerland

    Federico Faccio

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  1. Federico Faccio
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Editor information

Editors and Affiliations

  1. TIMA Laboratory, Grenoble, France

    RAOUL VELAZCO

  2. Université Bordeaux 1, France

    PASCAL FOUILLAT

  3. Universidade Federal do Rio Grande do Sul, Porto Alegre, Brazil

    RICARDO REIS

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Faccio, F. (2007). Design Hardening Methodologies for ASICs. In: VELAZCO, R., FOUILLAT, P., REIS, R. (eds) Radiation Effects on Embedded Systems. Springer, Dordrecht. https://doi.org/10.1007/978-1-4020-5646-8_7

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  • DOI: https://doi.org/10.1007/978-1-4020-5646-8_7

  • Publisher Name: Springer, Dordrecht

  • Print ISBN: 978-1-4020-5645-1

  • Online ISBN: 978-1-4020-5646-8

  • eBook Packages: EngineeringEngineering (R0)

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