This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Benveniste, A., Caillaud, B., and Guernic, P. L. (2000) Compositionality in dataflow synchronous languages: specification and distributed code generation. Information and Computation, 163:125–171.
Benveniste, A., Carloni, L., Caspi, P., and Sangiovanni-Vincentelli, A. (2003) Heterogeneous reactive systems modeling and correct-by-construction deployment. In: Proceedings of the Third International Conference on Embedded Software LCNS, Springer, Berlin.
Brunel, J.-Y., Kruijtzer, W., Kenter, H., Petrot, F., Pasquier, L., de Kock, E., and Smits, W. (2000) COSY communication IP’s. In: Proceedings of the 37th Design Automation Conference (DAC) 2000. Los Angeles, CA.
Carloni, L. P., McMillan, K. L., and Sangiovanni-Vincentelli, A. L. (2001) Theory of latency-insensitive design. IEEE Transactions on ComputerAided Design of Integrated Circuits and Systems, 20(9):1059–1076.
Coppola, M., Curaba, S., Grammatikakis, M., and Maruccia, G. (2003) IPSIM: SystemC 3.0 enhancements for communication refinement. In: Proceedings of Design Automation and Test in Europe (DATE) 2003. Munich, Germany.
Dömer, R., Gajski, D. D., and Gerstlauer, A. (2002) SpecC methodology for high-level modeling. In: Proceedings of the Ninth IEEE/DATC Electronic Design Processes Workshop. Moneterey, CA.
Guernic, P. L., Talpin, J.-P., and Lann, J.-C. L. (2003) Polychrony for system design. Journal of Circuits, Systems and Computers, 12(3):261–303.
Lee, E. A. and Parks, T. M. (1995) Dataflow process networks. Proceedings of the IEEE, 83(5):773–801.
Lennard, C., Schaumont, P., de Jong, G., Haverinen, A., and Hardee, P. (2000) Standards for system-level design: practical reality or solution in search of a question? In: Proceedings of Design Automation and Test in Europe (DATE) 2000. Paris, France.
Lu, Z., Sander, I., and Jantsch, A. (2002) A case study of hardware and software synthesis in ForSyDe. In: Proceedings of the 15th International Symposium on System Synthesis. Kyoto, Japan.
Millberg, M., Nilsson, E., Thid, R., and Jantsch, A. (2004). Guaranteed bandwidth using looped containers in temporally disjoint networks within the Nostrum network on chip. In: Proceedings of the Design Automation and Test Europe Conference (DATE) 2004. Paris.
Nilsson, E., Millberg, M., Öberg, J., and Jantsch, A. (2003) Load distribution with the proximity congestion awareness in a network on chip. In: Proceedings of the Design Automation and Test Europe (DATE) 2003, pp. 1126-1127.
Thid, R., Millberg, M., and Jantsch, A. (2003) Evaluating NoC communication backbones with simulation. In: Proceedings of the IEEE NorChip Conference.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2006 Springer
About this chapter
Cite this chapter
Lu, Z., Sander, I., Jantsch, A. (2006). Refining Synchronous Communication onto Network-on-Chip Best-Effort Services. In: Vachoux, A. (eds) Applications of Specification and Design Languages for SoCs. Springer, Dordrecht. https://doi.org/10.1007/978-1-4020-4998-9_2
Download citation
DOI: https://doi.org/10.1007/978-1-4020-4998-9_2
Publisher Name: Springer, Dordrecht
Print ISBN: 978-1-4020-4997-2
Online ISBN: 978-1-4020-4998-9
eBook Packages: EngineeringEngineering (R0)