Formal Modelling of Electronic Circuits Using Event-B

Case Study: SAE J1708 Serial Communication Link
  • Yann Zimmermann
  • Stefan Hallerstede
  • Dominique Cansell

Abstract

This chapter presents cha resents a study of the SAE J1708 Serial Communication link described in [1]. The study is carried out in Event-B, an extension of the B method. The system is implemented and decomposed using step-wise refinement. We p resent how to derive with this method a cycle-accurate hardware model. The model of the communication link system is composed of an arbitrary, itra finite, number of identical components that run concurrently. The model contains synchronization of these components required to control access to the communication link. At the end of the refinement we obtain an implementable model of the components which is translated into VHDL. The generated VHDL design is synthesizable, meaning that the implementable B model is synthesizable as well.

Keywords

Clarification BRet 

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References

  1. [1]
    SAE International. SAE J1708 revised OCT93, serial data communication between microcomputer systems in heavy-duty vehicle, http://www.sae.org
  2. [2]
    Jean-Raymond Abrial. Event Driven Electronic Circuit Construction, August 2001Google Scholar
  3. [3]
    J.-R. Abrial and L. Mussat. Introducing dynamic constraints in B. In B’98: Recent Advances in the development and Use of the B Method, volume 1393 of LNCS, 1998Google Scholar
  4. [4]
    Michael Leuschel and Michael Butler. ProB: A Model Checker for B. In FME 2003: Formal Methods, volume 2805 of LNC S, 2003Google Scholar

Copyright information

© Springer Science+Business Media New York 2004

Authors and Affiliations

  • Yann Zimmermann
    • 1
    • 2
  • Stefan Hallerstede
    • 1
  • Dominique Cansell
    • 2
  1. 1.KeesDA, Centre EquationGières;France
  2. 2.LORIAVandoeuvre-Lès-Nancy CedexFrance

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