Advertisement

Low Power Data Conversion for Sensing Applications

  • Terri S. Fiez
  • Ravi Naiknaware
  • Ruoxin Jiang

Abstract

Modern sensing applications often require high resolution conversion without compromising power consumption. In this Chapter, the maximum out-of-band quantization noise in deltasigma converters is shown to play a key role in optimizing the performance of low power and high resolution delta-sigma analog-to-digital converters (ADCs). Two design examples will be highlighted that illustrate the use of these techniques to achieve high resolution conversion with low power consumption in deep submicron CMOS processes.

Keywords

Quantization Noise Noise Floor Noise Transfer Function Sigma Modulator Analog Circuit Design 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. [1]
    J. Sauerbrey, T. Tille, D. Schmitt-Landsiedel, R. Thewes, “A 0.7-V MOSFET-only switched-opamp sigma-delta modulator in standard digital CMOS technology,” IEEE J. Solid-State Circuits, vol. 37, no. 12, pp. 1662–1669, Dec 2002.CrossRefGoogle Scholar
  2. [2]
    S. Tadjpour, E. Cijvat, E. Hegazi, A.A. Abidi, “A 900-MHz dualconversion low-IF GSM receiver in 0.35-μm CMOS,” IEEE J. Solid-State Circuits, vol. 36, no. 12, pp. 1992–2002. Dec. 2001.CrossRefGoogle Scholar
  3. [3]
    P. Malcovati, C. Azeredo Leme, P. O’Leary, F. Maloberti, and H. Baltes, “Smart sensor interface with A/D conversion and programmable calibration,” IEEE J. Solid-State Circuits, vol. 29, no. 8, pp. 963–966, Aug. 1994.CrossRefGoogle Scholar
  4. [4]
    C. Azeredo Leine and H. Baltes, “Multi-purpose interface for sensor systems fabricated by CMOS technology with post-processing,” Sensors and Actuators A, vols 37–38, pp. 77–81, Oct. 1993.CrossRefGoogle Scholar
  5. [5]
    K.C. Chao, S. Nadeem, W.L. Lee, and C.G. Sodini, “A high order topology for interpolative modulators for oversampling A/D converters,” IEEE Trans. Circuits and Systems II, vol. CAS-37, pp. 309–318, March 1990.Google Scholar
  6. [6]
    R. Jiang and T.S. Fiez, “A 14-bit ΔΣ ADC with 8X OSR and 4-MHz conversion bandwidth in a 0.18m CMOS Process,” IEEE J. Solid-State Circuits, vol. 39, no. 1, pp. 63–74, Jan. 2004.CrossRefGoogle Scholar
  7. [7]
    R. Schreier, “The delta-sigma Toobox 5.1,” http://next242.ece.orst.edu/pub/delsig.tar .Z ECE Department, Oregon State University, April 1998.Google Scholar

Copyright information

© Springer Science+Business Media New York 2004

Authors and Affiliations

  • Terri S. Fiez
    • 1
  • Ravi Naiknaware
    • 2
  • Ruoxin Jiang
    • 2
  1. 1.School of EECSOregon State UniversityCorvallisUSA
  2. 2.Maxim Integrated CircuitsHillsboroUSA

Personalised recommendations