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Digital Hardware Verification Methods

Existing and Potential Applications
  • G. Freytag
  • R. Shankar
Conference paper

Abstract

The ultimate goal of system-on-chip (SoC) verification is to obtain the highest possible level of confidence in the correctness of a design. But the complexity of SoCs is growing exponentially, even as the market is pressuring design cycle times to decrease. The dual challenges of increasing complexity and decreasing time are creating an urgent need for the application of advanced verification methods. With this in mind, we present a technique for identifying both existing and unexplored applications of digital hardware verification methods. The technique is patterned after the periodic table of chemical elements and is applicable to verification of other types of hardware and software as well. Our periodic table indicates which methods are the most broadly applicable and hence the most worthwhile to learn. The table also suggests which applications have potential for research.

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References

  1. [1]
    Brian Bailey, “Co-Verification: From Tool to Methodology,” white paper, www.mentor.com, June 2002.Google Scholar
  2. [2]
    Emil Girczyc, “Assertion-Based Verification Streamlines Design Outsourcing,” EEdesign, Oct. 25, 2002. www.eedesign.com/story/OEG2002102550034.Google Scholar
  3. [3]
    David Murray, “Synthesizable Verification IP Speeds Design Cycle,” EEdesign, Mar. 31, 2003. www.eedesign.com/story/OEG20030331S0061.Google Scholar
  4. [4]
    Gregory D. Peterson, “Predicting the Performance of SoC Verification Technologies,” Proceedings of the VHDL International Users Forum Fall Workshop, Oct. 18–20, 2000, pp.17–24.Google Scholar

Copyright information

© Springer Science+Business Media Dordrecht 2004

Authors and Affiliations

  • G. Freytag
    • 1
  • R. Shankar
    • 1
  1. 1.Dept. of Computer Science and EngineeringFlorida Atlantic UniversityBoca RatonUSA

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