Review of the Logic Design Process

  • Martyn D. Edwards
Chapter
Part of the Macmillan New Electronics Series book series

Abstract

As outlined in the preceding chapter, we are mainly concerned with an analysis of current computer-aided logic synthesis and logic optimisation techniques. In particular, the synthesis and optimisation of combinatorial logic and finite state machines. Descriptions of digital systems at the logic level are, normally, derived from the higher register transfer level — see figure 1.4. In order to gain an insight into how logic level descriptions are derived, an outline of the design process at the register transfer level is presented in section 2.1.

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2.4 References

  1. Barbacci, M. R. (1975). ‘A comparison of register transfer languages for describing computers and digital systems’, IEEE Transactions on Computers, C-24 (2), pp. 137–150.CrossRefGoogle Scholar
  2. Clare, C. R. (1973). Designing Logic Systems using State Machines, McGraw-Hill.Google Scholar
  3. Hartmanis, J. and Stearns, R. E. (1966). Algebraic Structure Theory of Sequential Machines, Prentice-Hall International Series in Applied Mathematics.Google Scholar
  4. Karnaugh, M. (1953). ‘The map method for synthesis of combinatorial logic circuits’, Transactions of the AIEE, 72 (1), pp. 593–599.Google Scholar
  5. McFarland, M. C, Parker, A. C. and Camposano, R. (1988). ‘Tutorial on high-level synthesis’, 25th Design Automation Conference, pp. 330–336.Google Scholar
  6. Roth, P. (1980). Computer Logic, Testing, and Verification, Pitman, London.Google Scholar
  7. Singh, A. K. and Tracey, J. H. (1981). ‘Development of comparison features for computer hardware description languages’, CHDL 81, Breuer, M. and Hartenstein, R. (Eds), North-Holland, pp. 247–263.Google Scholar

Copyright information

© M. D. Edwards 1992

Authors and Affiliations

  • Martyn D. Edwards
    • 1
  1. 1.Department of ComputationUMISTManchesterUK

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