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Addition

  • John B. Gosling
Chapter
Part of the Macmillan Computer Science Series book series

Abstract

The most important arithmetic operation in a computer is addition. Subtraction is commonly implemented by the addition of the negative of the subtrahend, and in this book will not be discussed separately. Both multiplication and division can be implemented by means of addition and subtraction. In order to keep the discussion unencumbered with the problems of representing negative numbers, this chapter will describe the most important techniques for performing addition, assuming unsigned binary numbers. The effect of introducing negative numbers, and the implementation of subtraction, will be delayed until chapter 4. For the purposes of this chapter all numbers will also be assumed to be ‘fixed point’.

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Bibliography

  1. Bedrij, O. J., ‘Carry Select Adders’, I.R.E. Trans. electronic Comput., 11 (1962) 340–6.CrossRefGoogle Scholar
  2. Gilchrist, B., Pomerene, J. J., and Wong, S. Y., ‘Fast Carry Logic for Digital Computers’, I.R.E. Trans. electronic Comput., 4 (1955) 133–6. This method is interesting, but not recommended (see p. 8).CrossRefGoogle Scholar
  3. Gosling, J. B., ‘A Review of High Speed Addition Techniques’, Proc. I.E.E., 118 (1971) 29–35.CrossRefGoogle Scholar
  4. Kilburn, T., Edwards, D. B. G., and Aspinall, D., ‘Parallel arithmetic unit using a saturated transistor fast carry circuit’, Proc. I.E.E., 107B (1960) 573–84. Interesting circuit technique for fast carry. Several other authors have described similar techniques. Gosling (1971) discussed the problems of using such methods with modern asymmetrical transistors.Google Scholar
  5. Kinniment, D. J., and Steven, G. B., ‘Sequential State Binary Parallel Adder’, Proc. I.E.E., 117 (1970) 1211–18. Probably the ultimate in propagate-adder logical design.CrossRefGoogle Scholar
  6. Lehman, M., and Burla, N., ‘Skip Technique for High Speed Carry Propagation in Binary Arithmetic Units’, I.R.E. Trans. electronic Comput., 10 (1961) 691–8.CrossRefGoogle Scholar
  7. Majerski, S., ‘On the Determination of Optimal Distribution of Carry Skips in Adders’, I.R.E. Trans. electronic Comput., 16 (1976) 45–58. Method not suitable for regular arrays required by MSI.Google Scholar
  8. Sklansky, J., ‘An Evaluation of Several Two Summand Binary Adders’, I.R.E. Trans. electronic Comput., 9 (1960) 213–26.CrossRefGoogle Scholar
  9. Sklansky, J., ‘Conditional Sum Addition Logic’, I.R.E. Trans. electronic Comput., 9 (1960) 226–31.CrossRefGoogle Scholar
  10. Weinberger, A., and Smith, J. L., ‘A One Microsecond Adder Using One Megacycle Circuitry’, I.R.E. Trans. electronic Comput., 5 (1956) 67–73. Original article on the carry-look-ahead principle.Google Scholar

Copyright information

© John B. Gosling 1980

Authors and Affiliations

  • John B. Gosling
    • 1
  1. 1.Department of Computer ScienceUniversity of ManchesterUK

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