Skip to main content
  • 76 Accesses

Abstract

Benchmarking can be considered to be an objective comparison of selected parameters of similar and competing processes, technologies or devices. In this discussion the differences and similarities of competing programmable logic devices, field programmable gate arrays and their development systems will be considered. This is not intended to be a definitive review or explanation, since benchmarking techniques are constantly evolving as manufacturers seek to identify the best features of their products. Nor should it be considered to present a preference for any particular product or benchmarking methodology, as this can only be genuinely achieved by a prospective user who has the particular design in mind, the financial constraints designated and the timescale outlined. Instead, the discussion will attempt to identify the majority of benchmarking methods currently used and illustrate any limitations and drawbacks. Although benchmarking will be considered in some detail, it has to be remembered that once a manufacturer has been chosen, it is probable that the company will stay with that product range for a minimum of several projects as there are additional costs involved when choosing a previously unused device. Typically, these are the time spent gaining familiarity with the architecture, the cost of purchasing the development hardware and software, the time spent learning how to use the development system, and the prototyping time spent uncovering the peculiarities of the practical side of the devices, in terms of timing delays, noise rejection and so on. Because of this, it is unlikely that the full range of different manufacturers devices will be considered for each new project, with the result that benchmarking becomes an occasional task undertaken when the existing product range being used appears unable to meet the current project specification and requirements.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

5.8 Further reading

  • The Logic Professor, Xilinx, Inc., 2100 Logic Drive, San Jose, C 95124-3400, USA. Available in the UK from Micro Call Ltd, 17 Thame Road, Thame, Oxon, OX9 3XD.

    Google Scholar 

  • PC-based Verilog Simulators, Y Trivedi and L Saunders, ASIC & EDA, April 1994.

    Google Scholar 

  • Saunders, L. and Trivedi, Y., VHDL Simulators, ASIC & EDA, July 1994.

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Copyright information

© 1997 R. C. Seals and G. F. Whapshott

About this chapter

Cite this chapter

Seals, R.C., Whapshott, G.F. (1997). Benchmarking. In: Programmable Logic: PLDs and FPGAs. Palgrave, London. https://doi.org/10.1007/978-1-349-14003-9_5

Download citation

  • DOI: https://doi.org/10.1007/978-1-349-14003-9_5

  • Publisher Name: Palgrave, London

  • Print ISBN: 978-1-349-14005-3

  • Online ISBN: 978-1-349-14003-9

  • eBook Packages: EngineeringEngineering (R0)

Publish with us

Policies and ethics