VLSI Architectures for the XYZ Video Codec

Part of the The Kluwer International Series in Engineering and Computer Science book series (SECS, volume 376)


In video and signal processing applications a measure of algorithmic complexity, which is typically used, is the total number of operations expressed in MOPS (million operations per second) or GOPS (giga operations per second). When designing a new video codec, the first step is to estimate its complexity [BK95, PDG95, F+95, GGV92]. For example, Table 8.1, adapted from [BK95], estimates MOPS (Million Operations Per Second) requirements for H.261 codec using CIF format at 30 frames/s. These estimates were computed assuming fast implementations of DCT and IDCT algorithms and fast 2-D logarithmic search for motion estimation. Total MOPS requirements for both the encoder and decoder are 1,166 MOPS. If the exhaustive search was used for motion estimation, this number would be much higher — 7,550 MOPS.


Motion Estimation Normalize Root Mean Square Error Video Codec VLSI Architecture Huffman Code 


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© Kluwer Academic Publishers 1997

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