Winner-Take-All Networks with Lateral Excitation

  • Giacomo Indiveri
Part of the The Springer International Series in Engineering and Computer Science book series (SECS, volume 447)


The analog VLSI current mode winner-take-all (WTA) circuit, originally presented in [16] is a good example of a very well designed architecture. It is able to process globally all the signals of an input array, it uses a very limited amount of transistors per input node and it operates in parallel, with strictly local interconnections. This architecture has been extensively and successfully used in a wide variety of applications [3, 6, 7]. More recently, interesting modifications to the original circuit have been proposed in [4] and [12]. In both cases, the authors added to each element of the WTA network a local feedback circuit to obtain a hysteretic behavior in the selection/de-selection of the winning node: every time a new winner is selected the local feedback circuit adds a constant bias current to its input. The circuit will then de-select the winner when either its input current becomes lower than other inputs by a factor greater than the bias current or when the whole network is reset. From a functional point of view, this operation enhances the resolution of the network and eliminates instability problems, providing a robust mechanism that withstands the selection of other potential winners unless they are stronger than the selected one by a set amount. The authors of [4] proposed a scheme for distributing locally the hysteretic component so that the winning input would be able to shift between adjacent locations maintaining its winning status, without having to reset the network.


Gate Voltage Input Current Neural Information Processing System Lateral Excitation Diffusor Network 
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Copyright information

© Kluwer Academic Publishers 1998

Authors and Affiliations

  • Giacomo Indiveri
    • 1
  1. 1.Institute of NeuroinformaticsZurichSwitzerland

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