Communicating Neuronal Ensembles between Neuromorphic Chips

  • Kwabena A. Boahen
Part of the The Springer International Series in Engineering and Computer Science book series (SECS, volume 447)


The small number of input-output connections available with standard chip-packaging technology, and the small number of routing layers available in VLSI technology, place severe limitations on the degree of intra- and interchip connectivity that can be realized in multichip neuromorphic systems. Inspired by the success of time-division multiplexing in communications [16] and computer networks [19], many researchers have adopted multiplexing to solve the connectivity problem [12, 67, 17]. Multiplexing is an effective way of leveraging the 5 order-of-magnitude difference in bandwidth between a neuron (hundreds of Hz) and a digital bus (tens of megahertz), enabling us to replace dedicated point-to-point connections among thousands of neurons with a handful of high-speed connections and thousands of switches (transistors). This approach pays off in VLSI technology because transistors take up a lot less area than wires, and are becoming relatively more and more compact as the fabrication process scales down to deep submicron feature sizes.


Channel Capacity Collision Probability Reset Phase Select Signal Temporal Dispersion 
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Copyright information

© Kluwer Academic Publishers 1998

Authors and Affiliations

  • Kwabena A. Boahen
    • 1
  1. 1.Physics of Computation Laboratory, MS 136-93California Institute of TechnologyPasadena

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