Diffusion Barriers for Ultra-Large-Scale Integrated Copper Metallization

  • A. KohnEmail author
  • M. Eizenberg


The microelectronics industry strives to continuously improve the speed and functionality of its integrated circuits. A significant contribution toward achieving this goal is the miniaturization of the semiconductor devices, in particular the reduction of the length of the gate of the metal-oxide-semiconductor (MOS) transistor. The typical size of this feature defines a term called “technology generation.” The device miniaturization also requires to reduce the lateral dimensions of the conducting interconnects and via-contacts (termed “Vias”).


Diffusion Barrier Atomic Layer Deposition Schottky Diode Electroless Deposition Good Barrier Property 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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© Springer Science+Business Media, LLC 2009

Authors and Affiliations

  1. 1.Department of MaterialsUniversity of OxfordOxfordUK
  2. 2.Faculty of MSE, Technion IITHaifaIsrael

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