This chapter describes special STA analyses such as time borrowing, clock gating and non-sequential timing checks. In addition, advanced STA concepts such as on-chip variations, statistical timing and tradeoff between power and timing are also presented.
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© 2009 Springer-Verlag US
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Bhasker, J., Chadha, R. (2009). Robust Verification. In: Static Timing Analysis for Nanometer Designs. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-93820-2_10
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DOI: https://doi.org/10.1007/978-0-387-93820-2_10
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Online ISBN: 978-0-387-93820-2
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