Advertisement

Embedded Flash Memory

  • Hideto Hidaka
Chapter
Part of the Integrated Circuits and Systems book series (ICIR)

Abstract

Chapter 6 first introduces the expanding variety of applications and requirements for embedded nonvolatile memory especially in microcontroller applications, then describes how and why embedded flash memory has expanded the functions and applications supported by process, device, and circuit technology evolutions. Embedded-specific flash memory technologies focused on the floating-gate and charge-trapping devices with split-gate and 2Tr cell concepts are overviewed in Section 6.2. Descriptions on basic embedded flash design concepts and examples of actual embedded flash designs along with challenges and future targets for embedded flash memory are provided in Section 6.3.

Keywords

Flash Memory Nonvolatile Memory Read Operation Embed Application Floating Gate 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

References

  1. 1.
    Blauwe J D (2002) Nanocrystal Nonvolatile Memory Devices. IEEE Trans. Nanotechnol., 1(1):72–77CrossRefGoogle Scholar
  2. 2.
    Borgatti M, Calì L, Sandre G D, Forêt B, Iezzi D, Lertora F, Muzzi G, Pasotti M, Poles M, Rolandi P L (2003) A 1GOPS Reconfigurable Signal Processing IC with Embedded FPGA and 3-Port 1.2 GB/s Flash Memory Subsystem. Dig. Tech. Papers ISSCC:2.7Google Scholar
  3. 3.
    Borgatti M, Cali L, De Sandre G, Foret B, Lertora I F, Muzzi G, Pasotti M, Poles M, and Rolandi P L (2003) A reconfigurable signal processing IC with embedded FPGA and multiport Flash memory. Proc. Des. Autom. Conf.:691–695Google Scholar
  4. 4.
    Borgatti M, Auricchio C, Pelliconi R, Canegallo R, Gazzina C, Tosoni A, Rolandi P L (2003) A multi-context 6.4 Gb/s/channel on-chip communication network using 0.18 μm2 Flash-EEPROM switches and elastic interconnects. Dig. Tech. Papers ISSCC:466–467Google Scholar
  5. 5.
    Brewer J E and Gill M (ed.) (2008) Nonvolatile Memory Technologies with Emphasis on Flash. IEEE Press:337--371Google Scholar
  6. 6.
  7. 7.
    Ibid.: Chapters 3–8, and 10–11Google Scholar
  8. 8.
    Brown B D and Brewer J E (ed.) (1998) Nonvolatile Semiconductor Memory Technol. IEEE Press: 22Google Scholar
  9. 9.
    Chen W-M, Swift C, Roberts D, Forbes K, Higman J, Maiti B, Paulson W, and Chang K-T (1997) A Novel Flash Memory Device with Split Gate Source Side Injection and ONO Charge Storage Stack (SPIN). Symp. VLSI Technol. Dig. Tech. Papers:63–64Google Scholar
  10. 10.
    Cho C Y-S, Chen M-J, Chen C-F, Tuntasood P, Fan D-T, and Liu T-Y (2006) A Novel Self-Aligned Highly Reliable Sidewall Split-Gate Flash Memory. IEEE Trans. Elec. Devices, 53(3):465–472CrossRefGoogle Scholar
  11. 11.
    Deml C, Jankowski M, and Thalmaier C (2007) A 0.13 μm 2.125 MB 23.5 ns Embedded Flash with 2 GB/s Read Throughput for Automotive Microcontrollers. Dig. Tech. Papers ISSCC:26.4Google Scholar
  12. 12.
    Ditewig T, Cuppens R, Chen K-L, Frowijn V, Jetten F, Kalkman W, Malabry M, Slenter A, Storms M, Tandan N, Teuben S and Grácio J (2001) An Embedded 1.2 V-Read Flash Memory Module in a 0.18 μm Logic Process. Dig. Tech. Papers ISSCC:34–35Google Scholar
  13. 13.
    Duuren M, Schaijk R, Slotboom M, Tello P, Goarin P, Akil N, Neuilly F, Rittersma Z, and Huerta A (2006) Performance and Reliability of 2-Transistor FN/FN Flash Arrays with Hafnium Based High-K Inter-Poly Dielectrics for Embedded NVM. Non-Volatile Semiconductor Memory Workshop:48–49Google Scholar
  14. 14.
    Eitan B, Pavan P, Bloom I, Aloni E, Frommer A, and Finzi D (1999) Can NROM, a 2-bit, Trapping Storage BVN Cell, Give a Real Challenge to Floating Gate Cells? Proc. Int. Conf. Solid State Devices and Materials Proc.:522–524Google Scholar
  15. 15.
    Eitan B, Pavan P, Bloom I, Aloni E, Frommer A, and Finzi D (2000) NROM: A Novel Localized Trapping, 2-Bit Nonvolatile Memory Cell. IEEE Ele. Device Lett. 21(11): 543–545CrossRefGoogle Scholar
  16. 16.
    Furnémont A, Rosmeulen M, Zanden K, Houdt J V, Meyer K D, and Maes H (2007) New Operating Mode Based on Electron/Hole Profile Matching in Nitride-Based Nonvolatile Memories. IEEE Elec. Device Lett., 28(4):276–278CrossRefGoogle Scholar
  17. 17.
    Furnémont A, Rosmeulen M, Zanden K, Houdt J V, Meyer K D, and Maes H (2007) Root Cause of Charge Loss in a Nitride-Based Localized Trapping Memory Cell. IEEE Trans. Elec. Devices, 54(6):1351–1359CrossRefGoogle Scholar
  18. 18.
    Hatanaka M and Hidaka H (2007) Value Creation in SOC/MCU Applications by Embedded Non-Volatile Memory Evolutions. Proc. Tech. Papers, Asian Solid-State Circuits Conf.:38–41Google Scholar
  19. 19.
    Hatanaka M and Hidaka H (2008) Embedded Flash Memory for MCU/SOC. ISSCC2008 Embedded Memory Forum, Feb. 2Google Scholar
  20. 20.
    Hayashi Y, Ogura S, Saito Y, and Ogura T (2000) Twin MONOS Cell with Dual Control Gate. Symp VLSI Tech. Dig. Tech. Papers:122–123Google Scholar
  21. 21.
    Hidaka H (2006) Embedded Memory Challenges for Innovations. Proc. System LSI Workshop, IEICE Japan, Nov. 27Google Scholar
  22. 22.
    Hidaka H (2007) Embedded NV memory design. ISSCC2007 NV-Memory Forum, Feb. 11Google Scholar
  23. 23.
    Hiraki M, Tanaka T, Shinagawa Y, Fujito M, Kawai Y, Mishina D, Ohshima T, Abe S, Kubota H, Yamaki T, Tamura S, Shiba K, Kuroda K, Ohsuga H, Masujima K, Matsubara K (1999) A 3.3 V 90 MHz Flash Memory Module Embedded in a 32b RISC Microcontroller. Dig. Tech. Papers ISSCC:116–117Google Scholar
  24. 24.
    Houdt J V, Heremans P, Deferm L, Groeseneken G, and Maes H E (1992) Analysis of the Enhanced Hot-Electron Injection in Split-Gate Transistors Useful for EEPROM Applications. IEEE Trans. Elec. Devices, 39(5):1150–1156CrossRefGoogle Scholar
  25. 25.
    Houdt J V, Haspeslagh L, Wellekens D, Deferm L, Groeseneken G and Maes H E (1993) HIMOS – A high efficiency flash E2PROM cell for embedded memory applications. IEEE Trans. Elec. Devices 40(12):2255–2263CrossRefGoogle Scholar
  26. 26.
    Houdt J V, Wellekens D, Haspeslagh L (2003) The HIMOS Flash Technology: The Alternative Solution for Low-Cost Embedded Memory. Proc. IEEE, 91(4):627–635CrossRefGoogle Scholar
  27. 27.
    Ikehashi T, Noda J, Imamiya K, Ichikawa M, Iwata A and Futatsuyama T (2000) A 60 ns Access 32 k Byte 3-Transistor Flash for Low Power Embedded Applications. Symp. VLSI Technol. Dig. Tech. Papers:162–165Google Scholar
  28. 28.
    International Technology Roadmap for Semiconductors (2007) http://www.itrs.net
  29. 29.
    Kamiya M, Kojima Y, Kato Y, Tanaka K and Hayashi Y (1982) EPROM Cell With High Gate Injection Efficiency. Tech. Digest Int. Elec. Device Meet.:741–744Google Scholar
  30. 30.
    Kawai S, Hosogane A, Kuge S, Abe T, Hashimoto K, Oishi T, Tsuji N, Sakakibara K, and Noguchi K (2008) An 8 kB EEPROM-Emulation DataFLASH Module for Automotive MCU. Dig. Tech. Papers ISSCC:508–509Google Scholar
  31. 31.
    Kianian S, Levi A, Lee D, and Hu Y-W (1994) A Novel 3 Volts-Only, Small Sector Erase, High Density Flash E2PROM. Symp. VLSl Technology Dig. Tech. Papers:71–72Google Scholar
  32. 32.
    Kothandaraman C, Iyer S K, and Iyer S S (2002) Electrically Programmable Fuse (eFUSE) Using Electromigration in Silicides. IEEE Elec. Device Letts., 23(9):523–525CrossRefGoogle Scholar
  33. 33.
    Kuo C, Yeargain J R, Downey III W J, Ilgenstein K A, Jorvig J R, Smith S L, Bormann A R (1982) An 80 ns 32 K EEPROM Using the FETMOS Cell. IEEE J. Solid-State Circuits SC-17(5):821–827CrossRefGoogle Scholar
  34. 34.
    Kuo C, Toms T, Weidner N M, Choe H, Shum D, Chang K-M and Smith P (1991) A Microcontroller with l00 K Bytes Embedded Flash EEPROM. VLSI-TSA:138–140Google Scholar
  35. 35.
    Kuo C, Weidner M, Toms T, Choe H, Chang K-M, Hanvood A, Jelemensky J, and Smith P (1992) A 512-kb flash EEPROM Embedded in a 32-b Microcontroller. IEEE J. Solid-State Circuits:574–582Google Scholar
  36. 36.
    Kuo C, Chrudimsky D, Jew T, Gallun C, Choy J, Wang B, and Pessoney S (1998) A 32-Bit RISC Microcontroller with 448 K Bytes of Embedded Flash Memory. Int. NonVolatile Memory Technol. Conf.:28–33Google Scholar
  37. 37.
    Lee H M, Woo S T, Chen H M, Shen R, Wang C D, Hsia L C and Hsu C C-H (2006) NeoFlashR – True Logic Single Poly Flash Memory Technology. Tech. Digest of Non-Volatile Semiconductor Memory Workshop:15–16Google Scholar
  38. 38.
    Liu W, Chang K T, Cavins C, Luderman B, Swift C, Chang K M, Morton B, Espinor G, and Ledford S (1997) A 2-Transistor Source-Select(2TS) flash EEPROM for 1.8 V-Only Applications. Non-Volatile Semiconductor Memory Worshop:4.1.1–4.1.3Google Scholar
  39. 39.
    Liu X; Markov V, Kotov A, Dang T N, Levi A, Yue I, Wang A and Qian R (2006) Endurance Characteristics of SuperFlash Memory. 8th Int. Conf. Solid-State and Integr. Circuit Technol.:763–765Google Scholar
  40. 40.
    Ma Y, Pesavento A, Nguyen H, Li H, Paulsen R (2006) Reliability and Qualification of a Floating Gate Memory Manufactured in a Generic Logic Process for RFID Applications. Non-Volatile Semiconductor Memory Workshop:44–45Google Scholar
  41. 41.
    Maayan E, Dvir R, Shor J, Polansky Y, Sofer Y, Bloom I, Avni D, Eitan B, Cohen Z, Meyassed M, Alpern Y, Palm H, Kamienski E S, Haibach P, Caspary D, Riedel S, and Knöfler R (2002) A 512 Mb NROM Flash Data Storage Memory with 8 MB/s Data Rate. Dig. Tech. Papers, ISSCC:100–101Google Scholar
  42. 42.
    Matsufuji K, Namekawa T, Nakano H, Ito H, Wada O, and Otsuka N (2007) A 65 nm Pure CMOS One-time Programmable Memory Using a Two-Port Antifuse Cell Implemented in a Matrix Structure. IEEE Asian Solid-State Circuits Conf.:212–215Google Scholar
  43. 43.
    McPartland R J, and Singh R (2000) 1.25 volt, low cost, embedded flash memory for low density applications. Dig. Tech. Papers, Symp. VLSI Circuits, 2000:158–161Google Scholar
  44. 44.
    Min H-C, Yater J, Kang S-T, Gasquet H, and Chindalore G (2007) Reliability Study of Split Gate Silicon Nanocrystal Flash EEPROM. Non-Volatile Semiconductor Memory Workshop:75–76Google Scholar
  45. 45.
    Minami S and Kamigaki Y (1991) Tunnel Oxide Thickness Optimization for High-Performance MNOS Nonvolatile Memory Devices. IEICE Trans. E74(4):875–884Google Scholar
  46. 46.
    Muralidhar R, Steimle R F, Sadd M, Rao R, Swift C T, Prinz E J, Yater J, Grieve L, Harber K, Hradsky B, Straub S, Acred B, Paulson W, Chen W, Parker L, Anderson S G H, Rossow M, Merchant T, Paransky M, Huynh T, Hadad D, Chang K-M, and White B E Jr (2003) A 6 V Embedded 90 nm Silicon Nanocrystal Nonvolatile Memory. Tech. Dig. IEDM:26.2.1–26.2.4Google Scholar
  47. 47.
    Nozaki T, Tanaka T, Kijiya Y, Kinoshita E, Tsuchiya T and Hayashi Y (1991) A 1-Mb EEPROM with MONOS Memory Cell for Semiconductor Disk Application. IEEE J. Solid-State Circuits, 26(4):497–501CrossRefGoogle Scholar
  48. 48.
    Raszka J, Advani M, Tiwari V, Varisco L, Der Hacobian N, Mittal A, Han M, Shirdel A, and Shubat A (2004) Embedded Flash Memory for Security Applications in a 0.13 μm CMOS Logic Process. Dig. Tech. Papers ISSCC:2.4Google Scholar
  49. 49.
    Rosenberg J (2005) Embedded flash on a CMOS logic process enables secure hardware encryption for deep submicron designs. Non-Volatile Memory Technology Symposium:19–21Google Scholar
  50. 50.
    Shin Y, Choi J, Kang C, Lee C, Park K-T, Lee J-S, Sel J, Kim V, Choi B, Sim J, Kim D, Cho H-J, and Kim K (2005) A novel NAND-type MONOS memory using 63 nm process technology for multi-gigabit flash EEPROMs. IEDM Tech. Dig.:327–330Google Scholar
  51. 51.
    Stenzl W and Hupper J (2008) Zuverlässig und schnell: Monos-Flash. EE-Times Europe, March 17. http://eetimes.eu/germany/206904002
  52. 52.
    Takahashi K, Doi H, Tamura N, Mimuro K, Hashizume T, Moriyama Y, and Okuda Y (1999) A 0.9 V Operation 2-Transistor Flash Memory for Embedded Logic LSIs. Symp. VLSI Technol.:21–22Google Scholar
  53. 53.
    Uhlmann G, Aipperspach T, Kirihata T, Kothandaraman C, Li Y Z, Paone C, Reed B, Robson N, Safran J, Schmitt D, Iyer S (2008) A Commercial Field-Programmable Dense eFUSE Array Memory with 99.999% Sense Yield for 45 nm SOI CMOS. Dig. Tech. Papers ISSCC:406–407Google Scholar
  54. 54.
    Wu A T, Chan T Y, Ko P K and Hu C (1986) A Novel High-Speed, 5-Volt Programming EPROM Structure with Source-Side Injection. Tech. Dig. Int. Elec. Device Meet.:584–587Google Scholar
  55. 55.
    Yater J A, Kang S T, Steimle R, Hong C M, Winstead B, Herrick M, Chindalore G (2007) Optimization of 90 nm Split Gate Nanocrystal Non-Volatile Memory. Non-Volatile Semiconductor Memory Workshop:77–78Google Scholar
  56. 56.
    Yatsuda Y, Nabetani S, Uchida K, Minami S, Terasawa M, Hagiwara T, Katto H, Yasui T (1985) Hi-MNOS II Technology for a 64-kbit Byte-Erasable 5-V-Only EEPROM. IEEE Trans. ED, 32(2):224–231CrossRefGoogle Scholar

Copyright information

© Springer Science+Business Media, LLC 2009

Authors and Affiliations

  • Hideto Hidaka
    • 1
  1. 1.Renesas Technology CorporationItamiJapan

Personalised recommendations