Silicon Nanocrystal Nonvolatile Memories

Part of the Nanostructure Science and Technology book series (NST)


Threshold Voltage Nonvolatile Memory Gate Bias Chemical Vapor Deposition Process Silicon Nanocrystals 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


  1. 1.
    R.P. Feynman, Ann. Meet. APS, Cal. Inst. Tech., Pasadena, 1959Google Scholar
  2. 2.
    See for example, ‘Nonvolatile Semiconductor Memory Technology: A Comprehensive Guide to Understanding and Using NVSM Devices’ William D. Brown and Joe E.Brewer, IEEE Press, New York, 1998Google Scholar
  3. 3.
    A.F. Tasch and L.H. Parker, Proc. of the IEEE, 77 374 (1989)CrossRefGoogle Scholar
  4. 4.
    Semiconductor Industry Association, International Technology Roadmap for Semiconductors, 2003Google Scholar
  5. 5.
    K. Naruke, S. Taguchi, and M. Wada, Tech. Digest International electron Devices Meeting, pp. 424–427, (1988)Google Scholar
  6. 6.
    S. Tiwari, F. Rana, K. Chan, H. Hanafi, Chan Wei, and D. Buchanan, Tech. Digest of International Electron Devices Meeting, 521, 1995.Google Scholar
  7. 7.
    M. Sadd, R. Muralidhar, S. Madhukar, K. Scheer, D. Gentile, B. Hradsky, M. Rossow, R. Rao, M. Ramon, A. Konkar, J. Conner, S. Bagchi, and B. E. White, NVSMW (2000)Google Scholar
  8. 8.
    D. Burnett, J. Higman, A. Hoefler, Chi-Nan Li, and P. Kuhn, IEDM Tech. Digest, 529 (2002)Google Scholar
  9. 9.
    S. Yamazaki, K. Hatakeyama, I. Kagawa, and Y. Yamashita, 1973 Int. Electron Devices Meeting Tech. Digest, 355 (1973)Google Scholar
  10. 10.
    B. Hradsky, R. Rao, R.F. Steimle, M. Sadd, S. Straub, R. Muralidhar, and B. White, NVSMW 99 (2003).Google Scholar
  11. 11.
    R. Muralidhar, R.F. Steimle, M. Sadd, R. Rao, C.T. Swift, E.J. Prinz, J. Yater, L. Grieve, K. Harber, B. Hradsky, S. Straub, B. Acred, W. Paulson, W. Chen, L. Parker, S.G.H. Anderson, M. Rossow, T. Merchant, M. Paransky, T. Huynh, D. Hadad, Ko-min Chang, and B.E. White Jr, Tech. Digest of International Electron Device Meeting, 26.2.1–26.2.4, (2003).Google Scholar
  12. 12.
    F.B. McClean, H.E. Boesch, Jr., and T.R. Oldham, “Electron-Hole Generation, Transport, and Trapping in SiO2” in “Ionizing Radiation Effects in MOS Devices and Circuits” edited by T.P. Ma and Paul V. Dressendorfer, Wiley-IEEE, 1989, p. 87–192.Google Scholar
  13. 13.
    F. Mazen, T. Baron, G. Bremond, N. Buffet, N. Rochat, P. Mur, and M.N. Semeria, J. Electrochem. Soc. 150, G203, (2003).CrossRefGoogle Scholar
  14. 14.
    M.L. Ostraat, J.W. De Blauwe, M.L. Green, L.D. Bell, M.L. Brongersma, J. Casperson, R.C. Flagan, and H.A. Atwater, Appl. Phys. Lett., 79, p.433–435 (2001).CrossRefGoogle Scholar
  15. 15.
    C.Y. Ng, T.P. Chen, L. Ding, and S. Fung, IEEE Elect. Dev. Lett., vol 27, 231–233 (2006)CrossRefGoogle Scholar
  16. 16.
    L. Tsybeskov, K. D. Hirschman, S. P. Duttagupta, M. Zacharias, P. M. Fauchet, J. McCaffrey, and D. J. Lockwood, Appl. Phys. Lett. 72, 43–45 (1998).CrossRefGoogle Scholar
  17. 17.
    F. Mazen, T. Baron, G. Bremond, N. Buffet, N. Rochat, P. Mur and M.N. Semeria, J. Electrochem. Soc. 150, G203, (2003).CrossRefGoogle Scholar
  18. 18.
    R.A. Rao, R.F. Steimle, M. Sadd, C.T. Swift, B. Hradsky, S. Straub, T. Merchant, M. Stoker, S.G.H. Anderson, M. Rossow, J. Yater, B. Acred, K. Harber, E.J. Prinz, B.E. White Jr., R. Muralidhar, Solid State Electron., 48, 1463 (2004).CrossRefGoogle Scholar
  19. 19.
    T. Baron, A. Fernandes, J.F. Damlencourt, B. De Salvo, F. Martin, F. Mazen, F. S. Haukka, Appl. Phys. Lett., 82, 4151 (2003).CrossRefGoogle Scholar
  20. 20.
    T. Kamins, Polycrystalline Silicon for Integrated Circuits and Displays, (Kluwer Academic Publishers, Dordrecht, 1998).Google Scholar
  21. 21.
    J.A. Venables, Introduction to Surface and Thin Film Processes, (Cambridge University, Cambridge, 2000).CrossRefGoogle Scholar
  22. 22.
    M.W. Stoker, T.P. Merchant, R. Rao, R. Muralidhar, S. Straub, and B.E. White Jr., in Materials and Processes for Nonvolatile Memories, edited by A. Claverie, D. Tsoukalas, T-J. King, and J.M. Slaughter (Mater. Res. Soc. Symp. Proc. 830, Warrendale, PA, 2005) p. D5.7.Google Scholar
  23. 23.
    K.C. Scheer, R.A. Rao, R. Muralidhar, S. Bagchi, J. Conner, L. Lozano, C. Perez, M. Sadd, B.E. White Jr.,. J. Appl. Phys., 93, 5637, (2003).CrossRefGoogle Scholar
  24. 24.
    L. Perniola, S. Bernardini, G. Iannaccone, B. De Salvo, G. Ghibaudo, P. Masson, and C. Gerardi, Proc. 34th ESSDERC 249 (2004).Google Scholar
  25. 25.
    Z.-H. Liu, C. Hu, J.-H. Huang, T.-Y. Chan, M.-C. Jeng, P.K. Ko, and Y.C. Cheng, IEEE Trans. Elec. Dev., 40 86 (1993).CrossRefGoogle Scholar
  26. 26.
    L. Perniola, S. Bernardini, G. Iannaccone, P. Masson, B. De Salvo, G. Ghibaudo, and C. Gerardi, IEEE Trans. Nanotech., 4 360 (2005).CrossRefGoogle Scholar
  27. 27.
    M.Sadd, S.G.H. Anderson, B. Hradsky, R. Muralidhar, E.J. Prinz, R. Rao, S. Straub, R.F. Steimle, C.T. Swift, B.E. White, and J.A. Yater, Solid State Electron., 49 1754 (2005).CrossRefGoogle Scholar

Copyright information

© Springer Science+Business Media, LLC 2009

Authors and Affiliations

  1. 1.Freescale SemiconductorUS
  2. 2.Binghamton Universitybruce

Personalised recommendations