Through-Silicon Via Fabrication, Backgrind, and Handle Wafer Technologies

  • Sharath Hosali
  • Greg Smith
  • Larry Smith
  • Susan Vitkavage
  • Sitaram Arkalgud
Part of the Integrated Circuits and Systems book series (ICIR)


The important method of bonding wafers to wafers or die to wafers has been discussed in an earlier chapter. In this chapter, we will examine the formation and filling of through-silicon vias (TSVs) and the post-bond process of thinning wafer-to-wafer pairs to further process TSVs and build metallization on the final exposed surface. In the section on wafer thinning, the hydrogen-induced splitting of thin silicon layers developed for silicon-on-insulator (SOI) will also be described. In a sense, this is a deviation from the basic processes to stack wafers or dies, but it describes a method to create a type of 3D, which was first envisioned in the 1980s, namely “stacked complementary metal-oxide semiconductor (CMOS)”. Finally, we will comment on processing with handle wafers and mention some of the current methods and areas of research to make this a more cost-effective way of transferring device layers.

Through-Silicon Vias Compared with Wirebonds

Through-silicon vias are...


Etch Rate Atomic Layer Deposition Seed Layer Physical Vapor Deposition Bond Layer 
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Copyright information

© Springer Science+Business Media, LLC 2008

Authors and Affiliations

  • Sharath Hosali
    • 1
  • Greg Smith
  • Larry Smith
  • Susan Vitkavage
  • Sitaram Arkalgud
  1. 1.SEMATECHAustinUSA

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