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Farrens, S. (2008). Wafer-Bonding Technologies and Strategies for 3D ICs. In: Tan, C., Gutmann, R., Reif, L. (eds) Wafer Level 3-D ICs Process Technology. Integrated Circuits and Systems. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-76534-1_4
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