Circuit Architectures for 3D Integration

  • Nisha Checka
Part of the Integrated Circuits and Systems book series (ICIR)


The recent electronics revolution has been fueled by the decades-long trend of exponential growth in circuit performance through device scaling. In current and future technologies, simple device scaling does not result in the same performance improvements. For deeply scaled technologies, optimizing interconnect performance is of equal importance as device performance. Following the International Technology Roadmap for Semiconductors (ITRS) specifications for scaled interconnect, worst-case and even average-case interconnect performance decreases with each technology generation [11]. Because the performance improvement achievable through Moore’s law scaling is bottoming out, new technologies to achieve performance enhancement are being explored. Three-dimensional integration is one such technology.

Three-dimensional integration offers several performance improvements for electronic systems. First, 3D integration offers a greater device density for a given footprint area....


Solder Bump Device Layer Readout Circuit Pass Transistor Heterogeneous Technology 
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Copyright information

© Springer Science+Business Media, LLC 2008

Authors and Affiliations

  1. 1.Lincoln LaboratoryMassachusetts Institute of TechnologyLexingtonUSA

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