Skip to main content

Variability-Aware Frequency Scaling in Multi-Clock Processors

  • Chapter
Adaptive Techniques for Dynamic Processor Optimization

Part of the book series: Series on Integrated Circuits and Systems ((ICIR))

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 129.00
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 169.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD 169.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

References

  1. A. Alameldeen and D. Wood, “Variability in Architectural Simulations of Multi-threaded Workloads”, HPCA’03: Proceedings of the 9th International Symposium on High-Performance Computer Architecture, 2003, pp. 7–18

    Google Scholar 

  2. K. Bowman, S. Duvall and J. Meindl, “Impact of Die-to-die and Within-die Parameter Fluctuations on the Maximum Clock Frequency Distribution for Gigascale Integration”, IEEE Journal of Solid-State Circuits, February 2002, Vol. 37, No. 2, pp. 183–190

    Article  Google Scholar 

  3. K. Bowman, S. Samaan and N. Hakim, “Maximum Clock Frequency Distribution with Practical VLSI Design Considerations”, ICICDT’04: Proceedings of the International Conference on Integrated Circuit Design and Technology, 2004, pp. 183–191

    Google Scholar 

  4. D. Brooks, V. Tiwari and M. Martonosi, “Wattch: A Framework for Architectural-level Power Analysis and Optimizations”, ISCA’00: Proceedings of the 27th International Symposium on Computer Architecture, 2000, pp. 83–94

    Google Scholar 

  5. J. Butts and G. Sohi, “A Static Power Model for Architects”, MICRO 33: Proceedings of the 33rd Annual ACM/IEEE International Symposium on Microarchitecture, 2000, pp. 191–201

    Google Scholar 

  6. T. Chelcea and S. Nowick, “Robust Interfaces for Mixed Systems with Application to Latency-insensitive Protocols”, DAC’01: Proceedings of the 38th annual Design Automation Conference, 2001, pp. 21–26

    Google Scholar 

  7. S. Herbert, S. Garg and D. Marculescu, “Reclaiming Performance and Energy Efficiency from Variability”, PAC2'06: Proceedings of the 3rd Watson Conference on Interaction Between Architecture, Circuits, and Compilers, 2006

    Google Scholar 

  8. H. Hua, C. Mineo, K. Schoenfliess, A. Sule, S. Melamed and W. Davis, “Performance Trend in Three-dimensional Integrated Circuits”, IITC'06: Proceedings of the 2006 International Interconnect Technology Conference, 2006, pp. 45–47

    Google Scholar 

  9. E. Humenay, D. Tarjan and K. Skadron, “Impact of Parameter Variations on Multi-core Chips”, ASGI’06: Proceedings of the 2006 Workshop on Architectural Support for Gigascale Integration, 2006

    Google Scholar 

  10. A. Iyer and D. Marculescu, “Power and Performance Evaluation of Globally Asynchronous Locally Synchronous Processors”, ISCA’02: Proceedings of the 29th International Symposium on Computer Architecture, 2002, pp. 158–168

    Google Scholar 

  11. X. Liang and D. Brooks, “Mitigating the Impact of Process Variations on Processor Register Files and Execution Units”, MICRO 39: Proceedings of the 39th Annual ACM/IEEE International Symposium on Microarchitecture, 2006, pp. 504–514

    Google Scholar 

  12. D. Marculescu and E. Talpes, “Variability and Energy Awareness: A Microarchitecture-level Perspective”, DAC’05: Proceedings of the 42nd annual Design Automation Conference, 2005, pp. 11–16

    Google Scholar 

  13. M. Orshansky, C. Spanos and C. Hu, “Circuit Performance Variability Decomposition”, IWSM’99: Proceedings of the 4th International Workshop on Statistical Metrology, 1999, pp. 10–13

    Google Scholar 

  14. G. Semeraro, G. Magklis, R. Balasubramonian, D. Albonesi, S. Dwarkadas and M. Scott, “Energy-efficient Processor Design Using Multiple Clock Domains with Dynamic Voltage and Frequency Scaling”, HPCA’02: Proceedings of the 8th International Symposium on High-Performance Computer Architecture, 2002, pp. 29–42

    Google Scholar 

  15. K. Skadron, M. Stan, W. Huang, S. Velusamy, K. Sankaranarayanan and D. Tarjan, “Temperature-aware Microarchitecture”, ISCA’03: Proceedings of the 30th International Symposium on Computer Architecture, 2003, pp. 2–13

    Google Scholar 

  16. Q. Wu, P. Juang, M. Martonosi and W. Clark, “Formal Online Methods for Voltage/Frequency Control in Multiple Clock Domain Microprocessors”, ASPLOS-XI: Proceedings of the 11th International Conference on Architectural Support for Programming Languages and Operating Systems, 2004, pp. 248–259

    Google Scholar 

  17. W. Zhao and Y. Cao, “New Generation of Predictive Technology Model for Sub-45 nm Design Exploration”, ISQED’06: Proceedings of the 7th International Symposium on Quality Electronic Design, 2006, pp. 585–590

    Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2008 Springer Science+Business Media, LLC

About this chapter

Cite this chapter

Herbert, S., Marculescu, D. (2008). Variability-Aware Frequency Scaling in Multi-Clock Processors. In: Wang, A., Naffziger, S. (eds) Adaptive Techniques for Dynamic Processor Optimization. Series on Integrated Circuits and Systems. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-76472-6_9

Download citation

  • DOI: https://doi.org/10.1007/978-0-387-76472-6_9

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-0-387-76471-9

  • Online ISBN: 978-0-387-76472-6

  • eBook Packages: EngineeringEngineering (R0)

Publish with us

Policies and ethics