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Dynamic Adaptation Using Body Bias, Supply Voltage, and Frequency

  • James Tschanz
Part of the Series on Integrated Circuits and Systems book series (ICIR)

Introduction

Continued technology scaling, while providing ever-increasing transistor density and reduced cost per transistor, has the unwanted side effects of increasing variations. Process variations can be due to many non-idealities that occur during the manufacturing process; however, chief among these is the difficulty of patterning line dimensions which are much smaller than the wavelength of light used during lithography. The resulting variation in channel length across the die (and across the wafer, from lot to lot, etc.) is one of the dominant causes of delay and leakage variation in high-performance microprocessors [1]. Other effects such as line-edge roughness and random dopant fluctuation also contribute to the variations, especially in circuits with small transistors, or circuits in which matching of devices is important. Die-to-die variations can be considered to impact all devices on the same die equally and cause differences among dies on the same wafer, as well as...

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Copyright information

© Springer Science+Business Media, LLC 2008

Authors and Affiliations

  • James Tschanz

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