Nanometer technology is gradually being applied after deep submicron technology due to the rapid progress of the VLSI fabrication process. Recently, system- on-a-chip (SoC) based products are gaining more advantages such as lower cost and power and high performance, but the new challenges are spending effort on hardware–software codesign, co-verification, and reusable intelligent property (IP). Moreover, the new fabrication process enhances transistor capacity greatly so that built-in multiprocessor system-on-a-chips (MPSoC) such as Xilinx [1] Virtex series FPGA platform are possible. Unfortunately, SoC's challenges are not solved completely; the MPSoC era is coming. Why is technology moving toward MPSoC? The reason is that the characteristic of MPSoC is simpler and more flexible than other architectures. For example, MPSoC-based architecture is easier for floating-pointoperation than redesigned hardware architecture. For computing mass and complex data, MPSoC is made more flexible by running software in parallel as opposed to hardware.
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Lee, TY., Fan, YH., Cheng, YM., Tsai, CC., Hsiao, RS. (2008). Partitioning Strategy for Embedded Multiprocessor FPGA Systems. In: Castillo, O., Xu, L., Ao, SI. (eds) Trends in Intelligent Systems and Computer Engineering. Lecture Notes in Electrical Engineering, vol 6. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-74935-8_28
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