3D-SoftChip: A Novel 3D Vertically Integrated Adaptive Computing System

  • Chul Kim
  • Alex Rassau
  • Stefan Lachowicz
  • Saeid Nooshabadi
  • Kamran Eshraghian
Part of the IFIP International Federation for Information Proc book series (IFIPAICT, volume 240)

This paper describes the high-level system modeling and functional verification of a novel 3D vertically integrated Adaptive Computing Systemon- Chip (ACSoC), which we term 3D-SoftChip. The 3D-SoftChip comprises two vertically integrated chips (a Configurable Array Processor and an Intelligent Configurable Switch) through an Indium Bump Interconnection Array (IBIA). This paper also describes an advanced HW/SW co-design and verification methodology using SystemC, which has been used to verify the functionality of the system and to allow architectural exploration in the early design stage. An implementation of the MPEG-4 full search block matching motion estimation algorithm has been applied to demonstrate the architectural superiority of the proposed novel 3D-ACSoC.


Processing Element Candidate Block Processing Element Array Search Position Adaptive Computing 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Science+Business Media, LLC 2007

Authors and Affiliations

  • Chul Kim
    • 1
  • Alex Rassau
    • 1
  • Stefan Lachowicz
    • 1
  • Saeid Nooshabadi
    • 2
  • Kamran Eshraghian
    • 3
  1. 1.Centre for Very High Speed Microelectronic Systems, School of Engineering and MathematicsEdith Cowan UniversityPerthAustralia
  2. 2.School of Electrical Engineering and TelecommunicationsThe University of New South WalesSydneyAustralia
  3. 3.Technology ParkEshraghian Laboratories Pty Ltd.BentleyAustralia

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