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Hardware/Software Co-Design

  • Dirk Jansen
Chapter

Abstract

As the complexity of IC design has increased, a trend to include ever larger portions of functionality on a single chip has been observed. Programs that once would have been considered ‘software’ are now encoded directly into memory within the chip structure. In the past a processor core was used which was controlled by discrete components elsewhere on the same circuit board. Extensive software support in form of compilers, assemblers, and simulators was also encoded into chips separate from the processor. Today these components, as well as peripheral modules (e.g., UART-serial interface, and PIO-parallel input/output interface) are used frequently in so called ‘embedded processors’. These discrete components are inserted block by block directly into the circuit during the design phase.

Keywords

Smart Card Processor Core High Level Language Intellectual Property Core Mentor Graphic 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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References

  1. [7.1]
    ALTERA: Megacore Functions for High-Density Design. Firmenschrift ALTERA, 1998Google Scholar
  2. [7.2]
    ARM Ltd.: Entwicklungsunterlagen der Firma ARM Ltd.–Cambridge, UK. http://www.arm.com/Google Scholar
  3. [7.3]
    Bischoff, O.; Jansen, D: Hochsprachen-Compiler für den FHOP. Berichtsheft des XVIII. MPC-Workshops in Albstadt-Sigmaringen, Hrsg. FH-Ulm, Januar 1998Google Scholar
  4. [7.4]
    Bolsens, I.; Hugo J. de Man et al: Hardware/Software Co-Design of Digital Telecommunication Systems. Proceedings of the IEEE, Vol. 85, No. 3, March 1997Google Scholar
  5. [7.5]
    Buchenrieder, K.; Sedelmeier, A.; Veith, V: Industrial HW/SW codesign, in Hardware/Software Co-Design. G. De Micheli and M. Sami, Eds.–Boston; Dordrecht; London: Kluwer, 1996Google Scholar
  6. [7.6]
    Firmenschrift der Fa. Design And Reuse, Grenoble 1998, http://www.design-reuse.com/ Google Scholar
  7. [7.7]
    Edwards, S.; Lavagno, L.; Edward A. Lee et. alt: Design of Embedded Systems: Formal Models, Validation, and Synthesis. Proceedings of the IEEE, Vol. 85, No. 3, March 1997Google Scholar
  8. [7.8]
    Fischer, M.; Vollmer, W.; Jansen, D: FHOP V2.0. Entwicklung der 2. Generation eines 16 Bit Mikroprozessor-Kerns auf der Basis des FHO-Prozessors FHOP. Berichtsheft des XX. MPC-Workshops in Furtwangen, Hrsg. FH-Ulm, Januar 1999Google Scholar
  9. [7.9]
    Gaiski, D.; Narayan, S.; Vahid, F.; Gong, J: Specification and Design of Embedded Systems.–Englewood Cliffs, NJ: Prentice Hall, 1994Google Scholar
  10. [7.10]
    Goosens, G. et. alt.: Embedded Software in Real-Time Signal Processing Systems: Design Technologies. Proceedings of the IEEE, Vol. 85, No. 3, March 1997Google Scholar
  11. [7.11]
    The Intellectual Propperty in Electronics, Conference and Exhibition, Proceedings IP 98.–Frankfurt, 1998Google Scholar
  12. [7.12]
    Jansen, D.; Klump, T: Thermologger, eine Chipkarte zur Aufzeichnung von Temperaturverläufen. Proceedings der ESandS 1997 in Nürnberg, 1997Google Scholar
  13. [7.13]
    Jansen, D.; Gieringer, T.; Zimpfer, F: A microprocessor in four months. Proceeding of the IEEE International ASIC Conference and Exhibit.–Rochester: 1994Google Scholar
  14. [7.14]
    Jansen, D.; Vollmer, W.; Klöser, F: Application Specific System Engineering with the Embedded Microprocessor-Kernel FHOP. Proceedings der internationalen Konferenz EMAC 97 in Barcelona, 1997Google Scholar
  15. [7.15]
    Leupers, R.; Marwedel, P: Retargable Code-Generation for Digital Signal Processors.–Boston; Dordrecht; London: Kluwer, 1991Google Scholar
  16. [7.16]
    Marwedel, P.; Goosens, G. (Eds): Code Generators for Embedded Processors.–Boston; Dordrecht; London: Kluwer, 1996Google Scholar
  17. [7.17]
    De Micheli, G.; Sami, M: Hardware/Software Co-Design. –— Amsterdam: Kluwer, 1996Google Scholar
  18. [7.18]
    De Micheli, G.; Gupta, Rajesh k: Hardware-Software-Co-Design. Proceedings of the IEEE, Vol. 85, No. 3, March 1997Google Scholar
  19. [7.19]
    Paulin, P. G. et al: Embedded Software in Real-Time Signal Processing Systems: Application and Architecture Trends. Proceedings of the IEEE, Vol. 85, No. 3, March 1997Google Scholar
  20. [7.20]
    The Reuse Methodology Manual. Kluwer Academic Publishers, Boston, USA, 240 pp, May 1998, herausgegeben von Mentor Graphics und SynopsysGoogle Scholar
  21. [7.21]
    Ben-Romdane, M: Lego-Like Integration of IP-Cores. The Intellectual Property in Electronics, Conference and Exhibition, Proceedings IP 98.–Frankfurt, 1998Google Scholar
  22. [7.22]
    Rozenblit, J.; Buchenrieder, K: Codesign: Computer-Aided Software/Hardware-Engineering.–Piscataway, NJ: IEEE, 1995Google Scholar
  23. [7.23]
    Sanchez, E.; Tomassini, M: Toward Evolvable Hardware.–New York: Springer-Verlag, 1996Google Scholar
  24. [7.24]
    Saucier, G. et al: Hard IP Migration. The Intellectual Property in Electronics, Conference and Exhibition, Proceedings IP 98.–Frankfurt, 1998Google Scholar
  25. [7.25]
    Tindell, K: Echtzeit-Betriebssystem für Ein-Chip-Systeme. Elektronik 18/1999, WEKA-Fach“-zeit”- schriften-Verlag GmbHGoogle Scholar
  26. [7.26]
    Vollmer, W: Entwurf eines Mikrocontrollers mit dem embedded Prozessorkern FHOP. Berichtsheft des XVI. MPC-Workshops in Reutlingen, Hrsg. FH-Ulm, Januar 1997Google Scholar
  27. [7.27]
    The Virtual Socket Interface Alliance, Verband der an der Entwicklung und Vermarktung von Intellectual Property und Virtuellen Komponenten interessierten Industrie, Internet Website: http://www.vsia.org/Google Scholar
  28. [7.28]
    Wolf, W: Hardware-software co-design of embedded systems. Proceedings of the IEEE, vol. 82, pp. 967–989, July 1994Google Scholar
  29. [7.29]
    Website LCC-Compiler: http://www.cs.princeton.edu/lcc/
  30. [7.30]
    Fraser, C.; Hanson, D: A Retargetable C Compiler: Design and Implementation. Addison-Wesley Publishing Company, 1995Google Scholar
  31. [7.31]
    Website LANCE: Leupers, R: http://Is12-www.informatik.uni-dortmund.de/leupers/lanceV2
  32. [7.32]
    Website GNU-Projekt: http://www.gnu.org
  33. [7.33]
    Website IAR-Systems: http://www.iar.com
  34. [7.34]
    Website Keil Software: http://www.keil.com
  35. [7.35]
    Baldischweiler, M.: Der Keil C51-Compiler einschließlich V6.0 und uVision 2, Einführung und Praxis Teil 1 (Buch). –— Grassbrunn, Keil Elektronik GmbHGoogle Scholar
  36. [7.36]
    Gajski, D. D.; Jianwen Zhu; Dömer, R.; Gerstlauer, A.; Shuqing Zhao: SpecC: Specification Language and Methodology.–Kluwer Academic Publishers, 2000Google Scholar
  37. [7.37]
    Gajski, D. D: Prinziples of Digital Design. –— Prentice Hall, 1997Google Scholar
  38. [7.38]
    Halambi, A.; Grun, P.; Ganesh, V.; Khare, A.; Dutt, N.; Nicolau, A: EXPRESSION: A language for Architecture Exploration through Compiler/Simulator Retargetability. International Conference DATE 99, http://www.ics.uci.edu
  39. [7.39]
    Gajski, D. D.; Dutt, N.; Wu, C. H.; Lin, Y. L: High Level Synthesis: Intoduction to Chip and System Design. — Kluwer Academic Publishers, 1994Google Scholar

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© Springer Science+Business Media New York 2003

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  • Dirk Jansen

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