Graphical Specification of System Behavior

  • Friedemann Stockmayer
  • Hans Kreutzer


Since the beginning of the 80’s schematic entry of digital circuits has been replaced by hardware description languages. This was driven by the spreading use of synthesis tools which needed a language for design entry. To avoid a variety of entry languages the hardware description languages VHDL and Verilog were standardized. The algorithms which can be coded using these languages had been presented graphically in the design of electronic circuits long before.


State Diagram Truth Table Graphical Description Sequential Circuit Output Signal Input 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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  1. [5.1]
    Hachtel, G. D.; Somenzi, F.: ‘Logic Synthesis and Verification Algorithms’.–Kluwer Academic Publishers, 1996Google Scholar
  2. [5.2]
    Mentor-Graphics: ‘Mentor/Renoir Tutorial’ 98.4. Okt. 1998Google Scholar
  3. [5.3]
    Summit Design Inc.: ‘Visual HDL User’s Guide’. Beaverton, OR, 1997Google Scholar

Copyright information

© Springer Science+Business Media New York 2003

Authors and Affiliations

  • Friedemann Stockmayer
  • Hans Kreutzer

There are no affiliations available

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