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Geometric Layout

  • Harald Toepfer
Chapter

Abstract

The layout of an integrated circuit consists of a great number of polygons attached to distinct layers. During the design process the layers are generated according to the needs of the foundry.

Keywords

Solid State Circuit NMOS Transistor CMOS Circuit Guard Ring Substrate Contact 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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© Springer Science+Business Media New York 2003

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  • Harald Toepfer

There are no affiliations available

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