Chapter 5 describes the available FPGAcore library I/O functions. The I/O devices include switches, the LCD, a decoder for seven segment LEDs, a multiple output clock divider, VGA output, keyboard input, and mouse input.
In complex hierarchical designs, intellectual property (IP) cores are frequently used. An IP core is a previously developed synthesizable hardware design that provides a widely used function. Commercially licensed IP cores include functions such as microprocessors, microcontrollers, bus interfaces, multimedia and DSP functions, and communications controllers. IP cores promote design reuse and reduce development time by providing common hardware functions for use in a new design.
KeywordsRapid Prototype Phase Lock Loop Intellectual Property Core FPGA Board Pixel Clock
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