Introducing System-on-a-Programmable-Chip

A new technology has emerged that enables designers to utilize a large FPGA that contains both memory and logic elements along with an intellectual property (IP) processor core to implement a computer and custom hardware for system-on-a-chip (SOC) applications. This new approach has been termed system-on-a-programmable-chip (SOPC).


Processor Core External Memory Hardware Description Language Autopilot System Soft Processor Core 
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  1. Portions reprinted, with permission, from T. S. Hall and J. O. Hamblen, “System-on-a-Programmable-Chip Development Platforms in the Classroom,” IEEE Transactions on Education, vol. 47, no. 4, pp. 502-507, Nov. 2004. © 2004 IEEE.Google Scholar
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  4. This speed is not achievable on all devices for either processor core. Some FPGAs may limit the maximum frequency to as low as 50 MHz.Google Scholar
  5. In very large quantities.Google Scholar
  6. Henrik B. Christophersen; R. W. Pickell; James C. Neidhoefer; Adrian A. Koller; Suresh K. Kannan; Eric N. Johnson, “A Compact Guidance, Navigation, and Control System for Unmanned Aerial Vehicles”, Journal of Aerospace Computing, Information, and Communication, pp.,1542-9423, vol.3 no.5.Google Scholar

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© Springer Science+Business Media, LLC 2008

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