Error Containment in the Time-Triggered System-On-a-Chip Architecture

  • R. Obermaisser
  • H. Kopetz
  • C. El Salloum
  • B. Huber
Part of the IFIP – The International Federation for Information Processing book series (IFIPAICT, volume 231)


Fault Injection Transient Fault Physical Fault Triple Modular Redundancy Single Board Computer 
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Copyright information

© International Federation for Information Processin 2007

Authors and Affiliations

  • R. Obermaisser
    • 1
  • H. Kopetz
    • 2
  • C. El Salloum
    • 3
  • B. Huber
    • 4
  1. 1.Vienna University of TechnologyAustria
  2. 2.Vienna University of TechnologyAustria
  3. 3.Vienna University of TechnologyAustria
  4. 4.Vienna University of TechnologyAustria

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