Part of the IFIP – The International Federation for Information Processing book series (IFIPAICT, volume 231)
Automatic Data Path Generation from C code for Custom Processors
KeywordsFunctional Unit Output Port Basic Block Data Path Custom Processor
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.
- Automated Configurable Processor Design Flow (2005). Automated Configurable Processor Design Flow, White Paper, Tensilica, Inc. http://www.tensilica.com/pdf/Tools white paper final-1.pdf January 2005.
- B. Landwehr, P. Marwedel, and R. D omer (1994). OSCAR: Optimum Simultaneous Scheduling, Allocation and Resource Binding Based on Integer Programming. In Proc. European Design Automation Conference, pages 90-95, Grenoble, France. IEEE Computer Society Press.Google Scholar
- Brewer, F. and Gajski, D. (1990). Chippe: A system for constraint driven behavioral synthesis. IEEE Trans. on Computer-Aided Design.Google Scholar
- Devadas, S. and Newton, R. (1989). Algorithms for hardware allocation in data path synthesis. IEEE Trans. on Computer-Aided Design.Google Scholar
- Diamond Standard Processor Core Family Architecture (2006). Diamond Standard Processor Core Family Architecture, White Paper, Tensilica, Inc. http://www.tensilica.com/pdf/Diamond WP.pdf, October 2006.
- Gajski, Daniel (October 2003). Nisc: The ultimate reconfigurable component. Technical report, Technical Report TR 03-28, University of California-Irvine.Google Scholar
- Goodwin, David and Petkov, Darin (2003). Automatic generation of application specific processors. In Proceedings of the International Conference on Compilers, Architecture and Synthesis for Embedded Systems.Google Scholar
- Gutberlet, P., M uller, J., Kr amer, H., and Rosenstiel, W. (1992). Automatic module allocation in high level synthesis. In Proceedings of the Conference on European Design Automation (EURO-DAC ’92), pages 328-333.Google Scholar
- Marwedel, P. (1993). The MIMOLA system: Detailed description of the system software. In Proceedings of Design Automation Conference. ACM/IEEE.Google Scholar
- Paulin, P.G. and Knight, J.P. (1989). Force-directed scheduling for the behavioral synthesis of ASICs. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.Google Scholar
- Reshadi, M. and Gajski, D. (2005). A cycle-accurate compilation algorithm for custom pipelined datapaths. In International Symposium on Hardware/Software Codesign and System Synthesis (CODES+ISSS).Google Scholar
- Reshadi, M., Gorjiara, B., and Gajski, D. (2005). Utilizing horizontal and vertical parallelism with no-instruction-set compiler for custom datapaths. In In Proceedings of International Conference on Computer Design.Google Scholar
- Stretch. Inc.: S5000 Software-Configurable Processors (2005). Stretch. Inc.: S5000 SoftwareConfigurable Processors http://www.stretchinc.com/products/devices.php.
- Tensilica: Xtensa LX (2005). Tensilica: Xtensa LX http://www.tensilica.com/products/xtensaLX.htm.
- Trajkovic, Jelena, Reshadi, Mehrdad, Gorjiara, Bita, and Gajski, Daniel (2006). A graph based algorithm for data path optimization in custom processors. In Proceedings of 9th EUROMICRO Conference on Digital System Design, pages 496-503. IEEE Computer Society.Google Scholar
- Tseng, C. and Seiwiorek, D.P. (1986). Automated synthesis of data paths in digital systems. IEEE Trans. on Computer-Aided Design.Google Scholar
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